From: Mark Brown Date: Mon, 24 Apr 2023 11:59:47 +0000 (+0100) Subject: Tegra TPM driver with HW flow control X-Git-Tag: v6.4-rc1~124^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=d9f3a60ebbbd7244fe532dc8dcd278ac1651247f;p=thirdparty%2Fkernel%2Flinux.git Tegra TPM driver with HW flow control Merge series from Krishna Yarlagadda : TPM devices may insert wait state on last clock cycle of ADDR phase. For SPI controllers that support full-duplex transfers, this can be detected using software by reading the MISO line. For SPI controllers that only support half-duplex transfers, such as the Tegra QSPI, it is not possible to detect the wait signal from software. The QSPI controller in Tegra234 and Tegra241 implement hardware detection of the wait signal which can be enabled in the controller for TPM devices. Add a flag for this in the SPI core and implement support in the Tegra QuadSPI driver. --- d9f3a60ebbbd7244fe532dc8dcd278ac1651247f