From: Artyom Tarasenko <atar4qemu@googlemail.com>
Date: Sat, 29 May 2010 20:48:25 +0000 (+0200)
Subject: sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)
X-Git-Tag: v0.13.0-rc0~409
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=da7ed37955d955b47a538fcfe65ad1cc730e69a5;p=thirdparty%2Fqemu.git

sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)

SuperSPARC MMU Breakpoint Action register is used by OBP at boot

The patch allows booting Solaris and some other OS with
SPARCStation-20 OBP.

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---

diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c
index aaacfc484e8..ef3504fad19 100644
--- a/target-sparc/op_helper.c
+++ b/target-sparc/op_helper.c
@@ -1745,6 +1745,7 @@ uint64_t helper_ld_asi(target_ulong addr, int asi, int size, int sign)
     case 0x31: // Turbosparc RAM snoop
     case 0x32: // Turbosparc page table descriptor diagnostic
     case 0x39: /* data cache diagnostic register */
+    case 0x4c: /* SuperSPARC MMU Breakpoint Action register */
         ret = 0;
         break;
     case 0x38: /* SuperSPARC MMU Breakpoint Control Registers */