From: Richard Henderson <richard.henderson@linaro.org>
Date: Sat, 20 Mar 2021 00:06:06 +0000 (-0600)
Subject: target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
X-Git-Tag: v6.0.0-rc0~5^2
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=dad90de78e9e9d47cefcbcd30115706b98e6ec87;p=thirdparty%2Fqemu.git

target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill

Pretend the fault always happens at page table level 3.

Failure to set this leaves level = 0, which is impossible for
ARMFault_Permission, and produces an invalid syndrome, which
reaches g_assert_not_reached in cpu_loop.

Fixes: 8db94ab4e5db ("linux-user/aarch64: Pass syndrome to EXC_*_ABORT")
Reported-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210320000606.1788699-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 9609333cbdf..3107f9823ef 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -163,6 +163,7 @@ bool arm_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
     } else {
         fi.type = ARMFault_Translation;
     }
+    fi.level = 3;
 
     /* now we have a real cpu fault */
     cpu_restore_state(cs, retaddr, true);