From: Greg Kroah-Hartman Date: Fri, 4 Aug 2017 21:45:16 +0000 (-0700) Subject: 4.4-stable patches X-Git-Tag: v4.12.5~8 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=dae16dcc3c55a451f8f648323d50307c7b03206b;p=thirdparty%2Fkernel%2Fstable-queue.git 4.4-stable patches added patches: arm-dts-n900-mark-emmc-slot-with-no-sdio-and-no-sd-flags.patch asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch drm-msm-ensure-that-the-hardware-write-pointer-is-valid.patch drm-msm-verify-that-msm_submit_bo_flags-are-set.patch ipv6-should-use-consistent-conditional-judgement-for-ip6-fragment-between-__ip6_append_data-and-ip6_finish_output.patch irqchip-keystone-fix-scheduling-while-atomic-on-rt.patch net-mlx4-remove-bug_on-from-icm-allocation-routine.patch r8169-add-support-for-rtl8168-series-add-on-card.patch spi-dw-make-debugfs-name-unique-between-instances.patch vfio-pci-use-32-bit-comparisons-for-register-address-for-gcc-4.5.patch x86-mce-amd-make-the-init-code-more-robust.patch --- diff --git a/queue-4.4/arm-dts-n900-mark-emmc-slot-with-no-sdio-and-no-sd-flags.patch b/queue-4.4/arm-dts-n900-mark-emmc-slot-with-no-sdio-and-no-sd-flags.patch new file mode 100644 index 00000000000..277ca5e1b02 --- /dev/null +++ b/queue-4.4/arm-dts-n900-mark-emmc-slot-with-no-sdio-and-no-sd-flags.patch @@ -0,0 +1,36 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Pali Rohár +Date: Wed, 14 Dec 2016 22:29:44 +0100 +Subject: ARM: dts: n900: Mark eMMC slot with no-sdio and no-sd flags + +From: Pali Rohár + + +[ Upstream commit 4cf48f1d7520a4d325af58eded4d8090e1b40be7 ] + +Trying to initialize eMMC slot as SDIO or SD cause failure in n900 port of +qemu. eMMC itself is not detected and is not working. + +Real Nokia N900 harware does not have this problem. As eMMC is really not +SDIO or SD based such change is harmless and will fix support for qemu. + +Signed-off-by: Pali Rohár +Acked-by: Pavel Machek +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm/boot/dts/omap3-n900.dts | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm/boot/dts/omap3-n900.dts ++++ b/arch/arm/boot/dts/omap3-n900.dts +@@ -697,6 +697,8 @@ + vmmc_aux-supply = <&vsim>; + bus-width = <8>; + non-removable; ++ no-sdio; ++ no-sd; + }; + + &mmc3 { diff --git a/queue-4.4/asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch b/queue-4.4/asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch new file mode 100644 index 00000000000..ace8b5c1ada --- /dev/null +++ b/queue-4.4/asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch @@ -0,0 +1,52 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Peter Ujfalusi +Date: Fri, 23 Dec 2016 11:21:10 +0200 +Subject: ASoC: tlv320aic3x: Mark the RESET register as volatile + +From: Peter Ujfalusi + + +[ Upstream commit 63c3194b82530bd71fd49db84eb7ab656b8d404a ] + +The RESET register only have one self clearing bit and it should not be +cached. If it is cached, when we sync the registers back to the chip we +will initiate a software reset as well, which is not desirable. + +Signed-off-by: Peter Ujfalusi +Reviewed-by: Jarkko Nikula +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/codecs/tlv320aic3x.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/sound/soc/codecs/tlv320aic3x.c ++++ b/sound/soc/codecs/tlv320aic3x.c +@@ -126,6 +126,16 @@ static const struct reg_default aic3x_re + { 108, 0x00 }, { 109, 0x00 }, + }; + ++static bool aic3x_volatile_reg(struct device *dev, unsigned int reg) ++{ ++ switch (reg) { ++ case AIC3X_RESET: ++ return true; ++ default: ++ return false; ++ } ++} ++ + static const struct regmap_config aic3x_regmap = { + .reg_bits = 8, + .val_bits = 8, +@@ -133,6 +143,9 @@ static const struct regmap_config aic3x_ + .max_register = DAC_ICC_ADJ, + .reg_defaults = aic3x_reg, + .num_reg_defaults = ARRAY_SIZE(aic3x_reg), ++ ++ .volatile_reg = aic3x_volatile_reg, ++ + .cache_type = REGCACHE_RBTREE, + }; + diff --git a/queue-4.4/drm-msm-ensure-that-the-hardware-write-pointer-is-valid.patch b/queue-4.4/drm-msm-ensure-that-the-hardware-write-pointer-is-valid.patch new file mode 100644 index 00000000000..82034f930ca --- /dev/null +++ b/queue-4.4/drm-msm-ensure-that-the-hardware-write-pointer-is-valid.patch @@ -0,0 +1,61 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Jordan Crouse +Date: Tue, 20 Dec 2016 08:54:29 -0700 +Subject: drm/msm: Ensure that the hardware write pointer is valid + +From: Jordan Crouse + + +[ Upstream commit 88b333b0ed790f9433ff542b163bf972953b74d3 ] + +Currently the value written to CP_RB_WPTR is calculated on the fly as +(rb->next - rb->start). But as the code is designed rb->next is wrapped +before writing the commands so if a series of commands happened to +fit perfectly in the ringbuffer, rb->next would end up being equal to +rb->size / 4 and thus result in an out of bounds address to CP_RB_WPTR. + +The easiest way to fix this is to mask WPTR when writing it to the +hardware; it makes the hardware happy and the rest of the ringbuffer +math appears to work and there isn't any point in upsetting anything. + +Signed-off-by: Jordan Crouse +[squash in is_power_of_2() check] +Signed-off-by: Rob Clark + +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/msm/adreno/adreno_gpu.c | 9 ++++++++- + drivers/gpu/drm/msm/msm_ringbuffer.c | 3 ++- + 2 files changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/msm/adreno/adreno_gpu.c ++++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.c +@@ -204,7 +204,14 @@ int adreno_submit(struct msm_gpu *gpu, s + void adreno_flush(struct msm_gpu *gpu) + { + struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu); +- uint32_t wptr = get_wptr(gpu->rb); ++ uint32_t wptr; ++ ++ /* ++ * Mask wptr value that we calculate to fit in the HW range. This is ++ * to account for the possibility that the last command fit exactly into ++ * the ringbuffer and rb->next hasn't wrapped to zero yet ++ */ ++ wptr = get_wptr(gpu->rb) & ((gpu->rb->size / 4) - 1); + + /* ensure writes to ringbuffer have hit system memory: */ + mb(); +--- a/drivers/gpu/drm/msm/msm_ringbuffer.c ++++ b/drivers/gpu/drm/msm/msm_ringbuffer.c +@@ -23,7 +23,8 @@ struct msm_ringbuffer *msm_ringbuffer_ne + struct msm_ringbuffer *ring; + int ret; + +- size = ALIGN(size, 4); /* size should be dword aligned */ ++ if (WARN_ON(!is_power_of_2(size))) ++ return ERR_PTR(-EINVAL); + + ring = kzalloc(sizeof(*ring), GFP_KERNEL); + if (!ring) { diff --git a/queue-4.4/drm-msm-verify-that-msm_submit_bo_flags-are-set.patch b/queue-4.4/drm-msm-verify-that-msm_submit_bo_flags-are-set.patch new file mode 100644 index 00000000000..8ec4841d247 --- /dev/null +++ b/queue-4.4/drm-msm-verify-that-msm_submit_bo_flags-are-set.patch @@ -0,0 +1,35 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Jordan Crouse +Date: Tue, 20 Dec 2016 08:54:31 -0700 +Subject: drm/msm: Verify that MSM_SUBMIT_BO_FLAGS are set + +From: Jordan Crouse + + +[ Upstream commit a6cb3b864b21b7345f824a4faa12b723c8aaf099 ] + +For every submission buffer object one of MSM_SUBMIT_BO_WRITE +and MSM_SUBMIT_BO_READ must be set (and nothing else). If we +allowed zero then the buffer object would never get queued to +be unreferenced. + +Signed-off-by: Jordan Crouse +Signed-off-by: Rob Clark +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/gpu/drm/msm/msm_gem_submit.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/gpu/drm/msm/msm_gem_submit.c ++++ b/drivers/gpu/drm/msm/msm_gem_submit.c +@@ -90,7 +90,8 @@ static int submit_lookup_objects(struct + pagefault_disable(); + } + +- if (submit_bo.flags & ~MSM_SUBMIT_BO_FLAGS) { ++ if ((submit_bo.flags & ~MSM_SUBMIT_BO_FLAGS) || ++ !(submit_bo.flags & MSM_SUBMIT_BO_FLAGS)) { + DRM_ERROR("invalid flags: %x\n", submit_bo.flags); + ret = -EINVAL; + goto out_unlock; diff --git a/queue-4.4/ipv6-should-use-consistent-conditional-judgement-for-ip6-fragment-between-__ip6_append_data-and-ip6_finish_output.patch b/queue-4.4/ipv6-should-use-consistent-conditional-judgement-for-ip6-fragment-between-__ip6_append_data-and-ip6_finish_output.patch new file mode 100644 index 00000000000..528628f2eac --- /dev/null +++ b/queue-4.4/ipv6-should-use-consistent-conditional-judgement-for-ip6-fragment-between-__ip6_append_data-and-ip6_finish_output.patch @@ -0,0 +1,43 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Zheng Li +Date: Wed, 28 Dec 2016 23:23:46 +0800 +Subject: ipv6: Should use consistent conditional judgement for ip6 fragment between __ip6_append_data and ip6_finish_output + +From: Zheng Li + + +[ Upstream commit e4c5e13aa45c23692e4acf56f0b3533f328199b2 ] + +There is an inconsistent conditional judgement between __ip6_append_data +and ip6_finish_output functions, the variable length in __ip6_append_data +just include the length of application's payload and udp6 header, don't +include the length of ipv6 header, but in ip6_finish_output use +(skb->len > ip6_skb_dst_mtu(skb)) as judgement, and skb->len include the +length of ipv6 header. + +That causes some particular application's udp6 payloads whose length are +between (MTU - IPv6 Header) and MTU were fragmented by ip6_fragment even +though the rst->dev support UFO feature. + +Add the length of ipv6 header to length in __ip6_append_data to keep +consistent conditional judgement as ip6_finish_output for ip6 fragment. + +Signed-off-by: Zheng Li +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + net/ipv6/ip6_output.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/net/ipv6/ip6_output.c ++++ b/net/ipv6/ip6_output.c +@@ -1361,7 +1361,7 @@ emsgsize: + */ + + cork->length += length; +- if (((length > mtu) || ++ if ((((length + fragheaderlen) > mtu) || + (skb && skb_is_gso(skb))) && + (sk->sk_protocol == IPPROTO_UDP) && + (rt->dst.dev->features & NETIF_F_UFO) && diff --git a/queue-4.4/irqchip-keystone-fix-scheduling-while-atomic-on-rt.patch b/queue-4.4/irqchip-keystone-fix-scheduling-while-atomic-on-rt.patch new file mode 100644 index 00000000000..11cabdcf1e2 --- /dev/null +++ b/queue-4.4/irqchip-keystone-fix-scheduling-while-atomic-on-rt.patch @@ -0,0 +1,129 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: "Strashko, Grygorii" +Date: Thu, 8 Dec 2016 17:33:10 -0600 +Subject: irqchip/keystone: Fix "scheduling while atomic" on rt + +From: "Strashko, Grygorii" + + +[ Upstream commit 2f884e6e688a0deb69e6c9552e51aef8b7e3f5f1 ] + +The below call chain generates "scheduling while atomic" backtrace and +causes system crash when Keystone 2 IRQ chip driver is used with RT-kernel: + +gic_handle_irq() + |-__handle_domain_irq() + |-generic_handle_irq() + |-keystone_irq_handler() + |-regmap_read() + |-regmap_lock_spinlock() + |-rt_spin_lock() + +The reason is that Keystone driver dispatches IRQ using chained IRQ handler +and accesses I/O memory through syscon->regmap(mmio) which is implemented +as fast_io regmap and uses regular spinlocks for synchronization, but +spinlocks transformed to rt_mutexes on RT. + +Hence, convert Keystone 2 IRQ driver to use generic irq handler instead of +chained IRQ handler. This way it will be compatible with RT kernel where it +will be forced thread IRQ handler while in non-RT kernel it still will be +executed in HW IRQ context. + +Cc: Suman Anna +Signed-off-by: Grygorii Strashko +Tested-by: Suman Anna +Link: https://lkml.kernel.org/r/20161208233310.10329-1-grygorii.strashko@ti.com +Signed-off-by: Jason Cooper +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/irqchip/irq-keystone.c | 28 +++++++++++++++++++--------- + 1 file changed, 19 insertions(+), 9 deletions(-) + +--- a/drivers/irqchip/irq-keystone.c ++++ b/drivers/irqchip/irq-keystone.c +@@ -19,9 +19,9 @@ + #include + #include + #include ++#include + #include + #include +-#include + #include + #include + #include +@@ -39,6 +39,7 @@ struct keystone_irq_device { + struct irq_domain *irqd; + struct regmap *devctrl_regs; + u32 devctrl_offset; ++ raw_spinlock_t wa_lock; + }; + + static inline u32 keystone_irq_readl(struct keystone_irq_device *kirq) +@@ -83,17 +84,15 @@ static void keystone_irq_ack(struct irq_ + /* nothing to do here */ + } + +-static void keystone_irq_handler(struct irq_desc *desc) ++static irqreturn_t keystone_irq_handler(int irq, void *keystone_irq) + { +- unsigned int irq = irq_desc_get_irq(desc); +- struct keystone_irq_device *kirq = irq_desc_get_handler_data(desc); ++ struct keystone_irq_device *kirq = keystone_irq; ++ unsigned long wa_lock_flags; + unsigned long pending; + int src, virq; + + dev_dbg(kirq->dev, "start irq %d\n", irq); + +- chained_irq_enter(irq_desc_get_chip(desc), desc); +- + pending = keystone_irq_readl(kirq); + keystone_irq_writel(kirq, pending); + +@@ -111,13 +110,15 @@ static void keystone_irq_handler(struct + if (!virq) + dev_warn(kirq->dev, "sporious irq detected hwirq %d, virq %d\n", + src, virq); ++ raw_spin_lock_irqsave(&kirq->wa_lock, wa_lock_flags); + generic_handle_irq(virq); ++ raw_spin_unlock_irqrestore(&kirq->wa_lock, ++ wa_lock_flags); + } + } + +- chained_irq_exit(irq_desc_get_chip(desc), desc); +- + dev_dbg(kirq->dev, "end irq %d\n", irq); ++ return IRQ_HANDLED; + } + + static int keystone_irq_map(struct irq_domain *h, unsigned int virq, +@@ -182,9 +183,16 @@ static int keystone_irq_probe(struct pla + return -ENODEV; + } + ++ raw_spin_lock_init(&kirq->wa_lock); ++ + platform_set_drvdata(pdev, kirq); + +- irq_set_chained_handler_and_data(kirq->irq, keystone_irq_handler, kirq); ++ ret = request_irq(kirq->irq, keystone_irq_handler, ++ 0, dev_name(dev), kirq); ++ if (ret) { ++ irq_domain_remove(kirq->irqd); ++ return ret; ++ } + + /* clear all source bits */ + keystone_irq_writel(kirq, ~0x0); +@@ -199,6 +207,8 @@ static int keystone_irq_remove(struct pl + struct keystone_irq_device *kirq = platform_get_drvdata(pdev); + int hwirq; + ++ free_irq(kirq->irq, kirq); ++ + for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++) + irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq)); + diff --git a/queue-4.4/net-mlx4-remove-bug_on-from-icm-allocation-routine.patch b/queue-4.4/net-mlx4-remove-bug_on-from-icm-allocation-routine.patch new file mode 100644 index 00000000000..57469aa5464 --- /dev/null +++ b/queue-4.4/net-mlx4-remove-bug_on-from-icm-allocation-routine.patch @@ -0,0 +1,42 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Leon Romanovsky +Date: Thu, 29 Dec 2016 18:37:11 +0200 +Subject: net/mlx4: Remove BUG_ON from ICM allocation routine + +From: Leon Romanovsky + + +[ Upstream commit c1d5f8ff80ea84768f5fae1ca9d1abfbb5e6bbaa ] + +This patch removes BUG_ON() macro from mlx4_alloc_icm_coherent() +by checking DMA address alignment in advance and performing proper +folding in case of error. + +Fixes: 5b0bf5e25efe ("mlx4_core: Support ICM tables in coherent memory") +Reported-by: Ozgur Karatas +Signed-off-by: Leon Romanovsky +Signed-off-by: Tariq Toukan +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/mellanox/mlx4/icm.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/net/ethernet/mellanox/mlx4/icm.c ++++ b/drivers/net/ethernet/mellanox/mlx4/icm.c +@@ -118,8 +118,13 @@ static int mlx4_alloc_icm_coherent(struc + if (!buf) + return -ENOMEM; + ++ if (offset_in_page(buf)) { ++ dma_free_coherent(dev, PAGE_SIZE << order, ++ buf, sg_dma_address(mem)); ++ return -ENOMEM; ++ } ++ + sg_set_buf(mem, buf, PAGE_SIZE << order); +- BUG_ON(mem->offset); + sg_dma_len(mem) = PAGE_SIZE << order; + return 0; + } diff --git a/queue-4.4/r8169-add-support-for-rtl8168-series-add-on-card.patch b/queue-4.4/r8169-add-support-for-rtl8168-series-add-on-card.patch new file mode 100644 index 00000000000..c5760249719 --- /dev/null +++ b/queue-4.4/r8169-add-support-for-rtl8168-series-add-on-card.patch @@ -0,0 +1,30 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Chun-Hao Lin +Date: Tue, 27 Dec 2016 16:29:43 +0800 +Subject: r8169: add support for RTL8168 series add-on card. + +From: Chun-Hao Lin + + +[ Upstream commit 610c908773d30907c950ca3b2ee8ac4b2813537b ] + +This chip is the same as RTL8168, but its device id is 0x8161. + +Signed-off-by: Chun-Hao Lin +Signed-off-by: David S. Miller +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/net/ethernet/realtek/r8169.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/ethernet/realtek/r8169.c ++++ b/drivers/net/ethernet/realtek/r8169.c +@@ -326,6 +326,7 @@ enum cfg_version { + static const struct pci_device_id rtl8169_pci_tbl[] = { + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8129), 0, 0, RTL_CFG_0 }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8136), 0, 0, RTL_CFG_2 }, ++ { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8161), 0, 0, RTL_CFG_1 }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8167), 0, 0, RTL_CFG_0 }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8168), 0, 0, RTL_CFG_1 }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8169), 0, 0, RTL_CFG_0 }, diff --git a/queue-4.4/series b/queue-4.4/series index 1e3fa02114a..be69507d9b8 100644 --- a/queue-4.4/series +++ b/queue-4.4/series @@ -45,10 +45,20 @@ vlan-propagate-mac-address-to-vlans.patch pstore-allow-prz-to-control-need-for-locking.patch pstore-correctly-initialize-spinlock-and-flags.patch pstore-use-dynamic-spinlock-initializer.patch -staging-sm750fb-avoid-conflicting-vesafb.patch net-skb_needs_check-accepts-checksum_none-for-tx.patch sched-cputime-fix-prev-steal-time-accouting-during-cpu-hotplug.patch xen-blkback-don-t-free-be-structure-too-early.patch xen-blkback-don-t-use-xen_blkif_get-in-xen-blkback-kthread.patch tpm-fix-a-kernel-memory-leak-in-tpm-sysfs.c.patch tpm-replace-device-number-bitmap-with-idr.patch +x86-mce-amd-make-the-init-code-more-robust.patch +r8169-add-support-for-rtl8168-series-add-on-card.patch +arm-dts-n900-mark-emmc-slot-with-no-sdio-and-no-sd-flags.patch +ipv6-should-use-consistent-conditional-judgement-for-ip6-fragment-between-__ip6_append_data-and-ip6_finish_output.patch +net-mlx4-remove-bug_on-from-icm-allocation-routine.patch +drm-msm-ensure-that-the-hardware-write-pointer-is-valid.patch +drm-msm-verify-that-msm_submit_bo_flags-are-set.patch +vfio-pci-use-32-bit-comparisons-for-register-address-for-gcc-4.5.patch +irqchip-keystone-fix-scheduling-while-atomic-on-rt.patch +asoc-tlv320aic3x-mark-the-reset-register-as-volatile.patch +spi-dw-make-debugfs-name-unique-between-instances.patch diff --git a/queue-4.4/spi-dw-make-debugfs-name-unique-between-instances.patch b/queue-4.4/spi-dw-make-debugfs-name-unique-between-instances.patch new file mode 100644 index 00000000000..45e0c2b56bd --- /dev/null +++ b/queue-4.4/spi-dw-make-debugfs-name-unique-between-instances.patch @@ -0,0 +1,36 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Phil Reid +Date: Thu, 22 Dec 2016 17:18:12 +0800 +Subject: spi: dw: Make debugfs name unique between instances + +From: Phil Reid + + +[ Upstream commit 13288bdf4adbaa6bd1267f10044c1bc25d90ce7f ] + +Some system have multiple dw devices. Currently the driver uses a +fixed name for the debugfs dir. Append dev name to the debugfs dir +name to make it unique. + +Signed-off-by: Phil Reid +Signed-off-by: Mark Brown +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/spi/spi-dw.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/spi/spi-dw.c ++++ b/drivers/spi/spi-dw.c +@@ -107,7 +107,10 @@ static const struct file_operations dw_s + + static int dw_spi_debugfs_init(struct dw_spi *dws) + { +- dws->debugfs = debugfs_create_dir("dw_spi", NULL); ++ char name[128]; ++ ++ snprintf(name, 128, "dw_spi-%s", dev_name(&dws->master->dev)); ++ dws->debugfs = debugfs_create_dir(name, NULL); + if (!dws->debugfs) + return -ENOMEM; + diff --git a/queue-4.4/staging-sm750fb-avoid-conflicting-vesafb.patch b/queue-4.4/staging-sm750fb-avoid-conflicting-vesafb.patch deleted file mode 100644 index 895f2423234..00000000000 --- a/queue-4.4/staging-sm750fb-avoid-conflicting-vesafb.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 740c433ec35187b45abe08bb6c45a321a791be8e Mon Sep 17 00:00:00 2001 -From: Teddy Wang -Date: Fri, 30 Jun 2017 21:57:43 +0100 -Subject: staging: sm750fb: avoid conflicting vesafb - -From: Teddy Wang - -commit 740c433ec35187b45abe08bb6c45a321a791be8e upstream. - -If vesafb is enabled in the config then /dev/fb0 is created by vesa -and this sm750 driver gets fb1, fb2. But we need to be fb0 and fb1 to -effectively work with xorg. -So if it has been alloted fb1, then try to remove the other fb0. - -In the previous send, why #ifdef is used was asked. -https://lkml.org/lkml/2017/6/25/57 - -Answered at: https://lkml.org/lkml/2017/6/25/69 -Also pasting here for reference. - -'Did a quick research into "why". -The patch d8801e4df91e ("x86/PCI: Set IORESOURCE_ROM_SHADOW only for the -default VGA device") has started setting IORESOURCE_ROM_SHADOW in flags -for a default VGA device and that is being done only for x86. -And so, we will need that #ifdef to check IORESOURCE_ROM_SHADOW as that -needs to be checked only for a x86 and not for other arch.' - -Cc: # v4.4+ -Signed-off-by: Teddy Wang -Signed-off-by: Sudip Mukherjee -Signed-off-by: Greg Kroah-Hartman - ---- - drivers/staging/sm750fb/sm750.c | 24 ++++++++++++++++++++++++ - 1 file changed, 24 insertions(+) - ---- a/drivers/staging/sm750fb/sm750.c -+++ b/drivers/staging/sm750fb/sm750.c -@@ -1002,6 +1002,26 @@ NO_PARAM: - } - } - -+static int lynxfb_kick_out_firmware_fb(struct pci_dev *pdev) -+{ -+ struct apertures_struct *ap; -+ bool primary = false; -+ -+ ap = alloc_apertures(1); -+ if (!ap) -+ return -ENOMEM; -+ -+ ap->ranges[0].base = pci_resource_start(pdev, 0); -+ ap->ranges[0].size = pci_resource_len(pdev, 0); -+#ifdef CONFIG_X86 -+ primary = pdev->resource[PCI_ROM_RESOURCE].flags & -+ IORESOURCE_ROM_SHADOW; -+#endif -+ remove_conflicting_framebuffers(ap, "sm750_fb1", primary); -+ kfree(ap); -+ return 0; -+} -+ - static int lynxfb_pci_probe(struct pci_dev *pdev, - const struct pci_device_id *ent) - { -@@ -1009,6 +1029,10 @@ static int lynxfb_pci_probe(struct pci_d - struct sm750_dev *sm750_dev = NULL; - int fbidx; - -+ err = lynxfb_kick_out_firmware_fb(pdev); -+ if (err) -+ return err; -+ - /* enable device */ - if (pci_enable_device(pdev)) { - pr_err("can not enable device.\n"); diff --git a/queue-4.4/tpm-replace-device-number-bitmap-with-idr.patch b/queue-4.4/tpm-replace-device-number-bitmap-with-idr.patch index cc04d805a66..9565d58d5b6 100644 --- a/queue-4.4/tpm-replace-device-number-bitmap-with-idr.patch +++ b/queue-4.4/tpm-replace-device-number-bitmap-with-idr.patch @@ -23,10 +23,10 @@ Signed-off-by: Jarkko Sakkinen Signed-off-by: Greg Kroah-Hartman --- - drivers/char/tpm/tpm-chip.c | 84 ++++++++++++++++++++------------------- + drivers/char/tpm/tpm-chip.c | 85 +++++++++++++++++++++------------------ drivers/char/tpm/tpm-interface.c | 1 drivers/char/tpm/tpm.h | 5 -- - 3 files changed, 48 insertions(+), 42 deletions(-) + 3 files changed, 49 insertions(+), 42 deletions(-) --- a/drivers/char/tpm/tpm-chip.c +++ b/drivers/char/tpm/tpm-chip.c @@ -99,7 +99,15 @@ Signed-off-by: Greg Kroah-Hartman kfree(chip); } -@@ -180,21 +190,18 @@ struct tpm_chip *tpmm_chip_alloc(struct +@@ -173,6 +183,7 @@ struct tpm_chip *tpmm_chip_alloc(struct + const struct tpm_class_ops *ops) + { + struct tpm_chip *chip; ++ int rc; + + chip = kzalloc(sizeof(*chip), GFP_KERNEL); + if (chip == NULL) +@@ -180,21 +191,18 @@ struct tpm_chip *tpmm_chip_alloc(struct mutex_init(&chip->tpm_mutex); init_rwsem(&chip->ops_sem); @@ -127,7 +135,7 @@ Signed-off-by: Greg Kroah-Hartman scnprintf(chip->devname, sizeof(chip->devname), "tpm%d", chip->dev_num); -@@ -252,19 +259,28 @@ static int tpm_add_char_device(struct tp +@@ -252,19 +260,28 @@ static int tpm_add_char_device(struct tp return rc; } @@ -158,7 +166,7 @@ Signed-off-by: Greg Kroah-Hartman } static int tpm1_chip_register(struct tpm_chip *chip) -@@ -319,11 +335,6 @@ int tpm_chip_register(struct tpm_chip *c +@@ -319,11 +336,6 @@ int tpm_chip_register(struct tpm_chip *c if (rc) goto out_err; @@ -170,7 +178,7 @@ Signed-off-by: Greg Kroah-Hartman chip->flags |= TPM_CHIP_FLAG_REGISTERED; if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) { -@@ -360,11 +371,6 @@ void tpm_chip_unregister(struct tpm_chip +@@ -360,11 +372,6 @@ void tpm_chip_unregister(struct tpm_chip if (!(chip->flags & TPM_CHIP_FLAG_REGISTERED)) return; diff --git a/queue-4.4/vfio-pci-use-32-bit-comparisons-for-register-address-for-gcc-4.5.patch b/queue-4.4/vfio-pci-use-32-bit-comparisons-for-register-address-for-gcc-4.5.patch new file mode 100644 index 00000000000..ddb34b0cee4 --- /dev/null +++ b/queue-4.4/vfio-pci-use-32-bit-comparisons-for-register-address-for-gcc-4.5.patch @@ -0,0 +1,41 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Arnd Bergmann +Date: Fri, 30 Dec 2016 08:13:47 -0700 +Subject: vfio-pci: use 32-bit comparisons for register address for gcc-4.5 + +From: Arnd Bergmann + + +[ Upstream commit 45e869714489431625c569d21fc952428d761476 ] + +Using ancient compilers (gcc-4.5 or older) on ARM, we get a link +failure with the vfio-pci driver: + +ERROR: "__aeabi_lcmp" [drivers/vfio/pci/vfio-pci.ko] undefined! + +The reason is that the compiler tries to do a comparison of +a 64-bit range. This changes it to convert to a 32-bit number +explicitly first, as newer compilers do for themselves. + +Signed-off-by: Arnd Bergmann +Signed-off-by: Alex Williamson +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + drivers/vfio/pci/vfio_pci_rdwr.c | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/drivers/vfio/pci/vfio_pci_rdwr.c ++++ b/drivers/vfio/pci/vfio_pci_rdwr.c +@@ -190,7 +190,10 @@ ssize_t vfio_pci_vga_rw(struct vfio_pci_ + if (!vdev->has_vga) + return -EINVAL; + +- switch (pos) { ++ if (pos > 0xbfffful) ++ return -EINVAL; ++ ++ switch ((u32)pos) { + case 0xa0000 ... 0xbffff: + count = min(count, (size_t)(0xc0000 - pos)); + iomem = ioremap_nocache(0xa0000, 0xbffff - 0xa0000 + 1); diff --git a/queue-4.4/x86-mce-amd-make-the-init-code-more-robust.patch b/queue-4.4/x86-mce-amd-make-the-init-code-more-robust.patch new file mode 100644 index 00000000000..66a2217578e --- /dev/null +++ b/queue-4.4/x86-mce-amd-make-the-init-code-more-robust.patch @@ -0,0 +1,37 @@ +From foo@baz Fri Aug 4 13:34:53 PDT 2017 +From: Thomas Gleixner +Date: Mon, 26 Dec 2016 22:58:20 +0100 +Subject: x86/mce/AMD: Make the init code more robust + +From: Thomas Gleixner + + +[ Upstream commit 0dad3a3014a0b9e72521ff44f17e0054f43dcdea ] + +If mce_device_init() fails then the mce device pointer is NULL and the +AMD mce code happily dereferences it. + +Add a sanity check. + +Reported-by: Markus Trippelsdorf +Reported-by: Boris Ostrovsky +Signed-off-by: Thomas Gleixner +Signed-off-by: Linus Torvalds +Signed-off-by: Sasha Levin +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/kernel/cpu/mcheck/mce_amd.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/x86/kernel/cpu/mcheck/mce_amd.c ++++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c +@@ -682,6 +682,9 @@ static int threshold_create_bank(unsigne + const char *name = th_names[bank]; + int err = 0; + ++ if (!dev) ++ return -ENODEV; ++ + if (is_shared_bank(bank)) { + nb = node_to_amd_nb(amd_get_nb_id(cpu)); +