From: Daniel Golle Date: Fri, 22 Aug 2025 16:11:57 +0000 (+0100) Subject: net: dsa: lantiq_gswip: introduce bitmap for MII ports X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=dc6156976d2efd95173b81ef468e03236780a652;p=thirdparty%2Fkernel%2Fstable.git net: dsa: lantiq_gswip: introduce bitmap for MII ports Instead of relying on hard-coded numbers for MII ports, introduce a bitmap for MII ports. This is done in order to prepare for supporting MaxLinear GSW1xx ICs which got a different layout of ports. Signed-off-by: Daniel Golle Reviewed-by: Vladimir Oltean Link: https://patch.msgid.link/019fc8ed06f2317976eac143320d1dc046e8f392.1755878232.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/dsa/lantiq_gswip.c b/drivers/net/dsa/lantiq_gswip.c index bd6ea4341f0ba..dfb2c5f627f67 100644 --- a/drivers/net/dsa/lantiq_gswip.c +++ b/drivers/net/dsa/lantiq_gswip.c @@ -183,14 +183,20 @@ static void gswip_mii_mask(struct gswip_priv *priv, u32 clear, u32 set, static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set, int port) { - /* There's no MII_CFG register for the CPU port */ - if (!dsa_is_cpu_port(priv->ds, port)) - gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port)); + /* MII_CFG register only exists for MII ports */ + if (!(priv->hw_info->mii_ports & BIT(port))) + return; + + gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port)); } static void gswip_mii_mask_pcdu(struct gswip_priv *priv, u32 clear, u32 set, int port) { + /* MII_PCDU register only exists for MII ports */ + if (!(priv->hw_info->mii_ports & BIT(port))) + return; + switch (port) { case 0: gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU0); @@ -1992,12 +1998,14 @@ static void gswip_shutdown(struct platform_device *pdev) static const struct gswip_hw_info gswip_xrx200 = { .max_ports = 7, .allowed_cpu_ports = BIT(6), + .mii_ports = BIT(0) | BIT(1) | BIT(5), .phylink_get_caps = gswip_xrx200_phylink_get_caps, }; static const struct gswip_hw_info gswip_xrx300 = { .max_ports = 7, .allowed_cpu_ports = BIT(6), + .mii_ports = BIT(0) | BIT(5), .phylink_get_caps = gswip_xrx300_phylink_get_caps, }; diff --git a/drivers/net/dsa/lantiq_gswip.h b/drivers/net/dsa/lantiq_gswip.h index 8703c947028a6..1bd05348f1e1d 100644 --- a/drivers/net/dsa/lantiq_gswip.h +++ b/drivers/net/dsa/lantiq_gswip.h @@ -216,6 +216,7 @@ struct gswip_hw_info { int max_ports; unsigned int allowed_cpu_ports; + unsigned int mii_ports; void (*phylink_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); };