From: Bjorn Helgaas Date: Fri, 3 Oct 2025 17:13:19 +0000 (-0500) Subject: Merge branch 'pci/controller/mediatek-gen3' X-Git-Tag: v6.18-rc1~60^2~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=dde4b05e26c5077d751ba1ca71aaf2d0bfa8a180;p=thirdparty%2Fkernel%2Fstable.git Merge branch 'pci/controller/mediatek-gen3' - Add optional sys clock ready time setting to avoid sys_clk_rdy signal glitching in MT6991 and MT8196 (AngeloGioacchino Del Regno) - Add DT binding and driver support for MT6991 and MT8196 (AngeloGioacchino Del Regno) * pci/controller/mediatek-gen3: PCI: mediatek-gen3: Add support for MediaTek MT8196 SoC dt-bindings: PCI: mediatek-gen3: Add support for MT6991/MT8196 PCI: mediatek-gen3: Implement sys clock ready time setting --- dde4b05e26c5077d751ba1ca71aaf2d0bfa8a180