From: Rodrigo Siqueira Date: Wed, 17 Apr 2024 16:59:56 +0000 (-0600) Subject: drm/amd/display: Improve registers write X-Git-Tag: v6.11-rc1~141^2~25^2~555 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=dff0360a49b3dd4d9de4d7719137712b15d33690;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: Improve registers write Add REG_SEQ_SUBMIT and REG_SEQ_WAIT_DONE to optimize the burst write for the regama lut. Acked-by: Wayne Lin Signed-off-by: Rodrigo Siqueira Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c index 006e238420164..f2a2d53e96894 100644 --- a/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c +++ b/drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c @@ -410,9 +410,10 @@ void dpp1_cm_program_regamma_lut(struct dpp *dpp_base, REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_red_reg); REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_green_reg); REG_SET(CM_RGAM_LUT_DATA, 0, CM_RGAM_LUT_DATA, rgb[i].delta_blue_reg); - } + REG_SEQ_SUBMIT(); + REG_SEQ_WAIT_DONE(); } void dpp1_cm_configure_regamma_lut(