From: Konrad Dybcio <konrad.dybcio@linaro.org>
Date: Wed, 4 Jan 2023 17:16:41 +0000 (+0100)
Subject: arm64: dts: qcom: sm6350: Add OSM L3 node
X-Git-Tag: v6.3-rc1~202^2~45^2~67
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e17a806571bb01bb951faeec645944850241eae3;p=thirdparty%2Flinux.git

arm64: dts: qcom: sm6350: Add OSM L3 node

Enable the OSM block responsible for scaling the L3 cache.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230104171643.1004054-2-konrad.dybcio@linaro.org
---

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 837c681319d78..51ff33d24499d 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1678,6 +1678,16 @@
 			};
 		};
 
+		osm_l3: interconnect@18321000 {
+			compatible = "qcom,sm6350-osm-l3", "qcom,osm-l3";
+			reg = <0x0 0x18321000 0x0 0x1000>;
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
+			clock-names = "xo", "alternate";
+
+			#interconnect-cells = <1>;
+		};
+
 		cpufreq_hw: cpufreq@18323000 {
 			compatible = "qcom,cpufreq-hw";
 			reg = <0 0x18323000 0 0x1000>, <0 0x18325800 0 0x1000>;