From: Greg Kroah-Hartman Date: Sat, 22 Apr 2023 16:06:58 +0000 (+0200) Subject: 6.2-stable patches X-Git-Tag: v4.14.314~67 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e2216ef68dc0cf1bb656b5b07db9845b1d79fb1f;p=thirdparty%2Fkernel%2Fstable-queue.git 6.2-stable patches added patches: alsa-hda-realtek-fix-mute-micmute-leds-for-a-hp-probook.patch btrfs-reinterpret-async-discard-iops_limit-0-as-no-delay.patch btrfs-set-default-discard-iops_limit-to-1000.patch iio-dac-ad5755-add-missing-fwnode_handle_put.patch iio-light-tsl2772-fix-reading-proximity-diodes-from-device-tree.patch loongarch-check-unwind_error-in-arch_stack_walk.patch loongarch-fix-probing-of-the-crc32-feature.patch loongarch-mark-3-symbol-exports-as-non-gpl.patch loongarch-module-set-section-addresses-to-0x0.patch rust-kernel-mark-rust_fmt_argument-as-extern-c.patch --- diff --git a/queue-6.2/alsa-hda-realtek-fix-mute-micmute-leds-for-a-hp-probook.patch b/queue-6.2/alsa-hda-realtek-fix-mute-micmute-leds-for-a-hp-probook.patch new file mode 100644 index 00000000000..fe20d56b288 --- /dev/null +++ b/queue-6.2/alsa-hda-realtek-fix-mute-micmute-leds-for-a-hp-probook.patch @@ -0,0 +1,32 @@ +From 2ae147d643d326f74d93ba4f72a405f25f2677ea Mon Sep 17 00:00:00 2001 +From: Andy Chi +Date: Thu, 20 Apr 2023 11:59:41 +0800 +Subject: ALSA: hda/realtek: fix mute/micmute LEDs for a HP ProBook + +From: Andy Chi + +commit 2ae147d643d326f74d93ba4f72a405f25f2677ea upstream. + +There is a HP ProBook 455 G10 which using ALC236 codec and need the +ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF quirk to make mute LED and +micmute LED work. + +Signed-off-by: Andy Chi +Cc: +Link: https://lore.kernel.org/r/20230420035942.66817-1-andy.chi@canonical.com +Signed-off-by: Takashi Iwai +Signed-off-by: Greg Kroah-Hartman +--- + sound/pci/hda/patch_realtek.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/sound/pci/hda/patch_realtek.c ++++ b/sound/pci/hda/patch_realtek.c +@@ -9468,6 +9468,7 @@ static const struct snd_pci_quirk alc269 + SND_PCI_QUIRK(0x103c, 0x8b47, "HP", ALC245_FIXUP_CS35L41_SPI_2_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x8b5d, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), + SND_PCI_QUIRK(0x103c, 0x8b5e, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), ++ SND_PCI_QUIRK(0x103c, 0x8b65, "HP ProBook 455 15.6 inch G10 Notebook PC", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), + SND_PCI_QUIRK(0x103c, 0x8b66, "HP", ALC236_FIXUP_HP_MUTE_LED_MICMUTE_VREF), + SND_PCI_QUIRK(0x103c, 0x8b7a, "HP", ALC236_FIXUP_HP_GPIO_LED), + SND_PCI_QUIRK(0x103c, 0x8b7d, "HP", ALC236_FIXUP_HP_GPIO_LED), diff --git a/queue-6.2/btrfs-reinterpret-async-discard-iops_limit-0-as-no-delay.patch b/queue-6.2/btrfs-reinterpret-async-discard-iops_limit-0-as-no-delay.patch new file mode 100644 index 00000000000..a659c43134d --- /dev/null +++ b/queue-6.2/btrfs-reinterpret-async-discard-iops_limit-0-as-no-delay.patch @@ -0,0 +1,73 @@ +From ef9cddfe57d86aac6b509b550136395669159b30 Mon Sep 17 00:00:00 2001 +From: Boris Burkov +Date: Wed, 5 Apr 2023 12:43:59 -0700 +Subject: btrfs: reinterpret async discard iops_limit=0 as no delay + +From: Boris Burkov + +commit ef9cddfe57d86aac6b509b550136395669159b30 upstream. + +Currently, a limit of 0 results in a hard coded metering over 6 hours. +Since the default is a set limit, I suspect no one truly depends on this +rather arbitrary setting. Repurpose it for an arguably more useful +"unlimited" mode, where the delay is 0. + +Note that if block groups are too new, or go fully empty, there is still +a delay associated with those conditions. Those delays implement +heuristics for not trimming a region we are relatively likely to fully +overwrite soon. + +CC: stable@vger.kernel.org # 6.2+ +Reviewed-by: Neal Gompa +Signed-off-by: Boris Burkov +Reviewed-by: David Sterba +Signed-off-by: David Sterba +Signed-off-by: Greg Kroah-Hartman +--- + fs/btrfs/discard.c | 19 ++++++++++++------- + 1 file changed, 12 insertions(+), 7 deletions(-) + +--- a/fs/btrfs/discard.c ++++ b/fs/btrfs/discard.c +@@ -56,8 +56,6 @@ + #define BTRFS_DISCARD_DELAY (120ULL * NSEC_PER_SEC) + #define BTRFS_DISCARD_UNUSED_DELAY (10ULL * NSEC_PER_SEC) + +-/* Target completion latency of discarding all discardable extents */ +-#define BTRFS_DISCARD_TARGET_MSEC (6 * 60 * 60UL * MSEC_PER_SEC) + #define BTRFS_DISCARD_MIN_DELAY_MSEC (1UL) + #define BTRFS_DISCARD_MAX_DELAY_MSEC (1000UL) + #define BTRFS_DISCARD_MAX_IOPS (1000U) +@@ -577,6 +575,7 @@ void btrfs_discard_calc_delay(struct btr + s32 discardable_extents; + s64 discardable_bytes; + u32 iops_limit; ++ unsigned long min_delay = BTRFS_DISCARD_MIN_DELAY_MSEC; + unsigned long delay; + + discardable_extents = atomic_read(&discard_ctl->discardable_extents); +@@ -607,13 +606,19 @@ void btrfs_discard_calc_delay(struct btr + } + + iops_limit = READ_ONCE(discard_ctl->iops_limit); +- if (iops_limit) ++ ++ if (iops_limit) { + delay = MSEC_PER_SEC / iops_limit; +- else +- delay = BTRFS_DISCARD_TARGET_MSEC / discardable_extents; ++ } else { ++ /* ++ * Unset iops_limit means go as fast as possible, so allow a ++ * delay of 0. ++ */ ++ delay = 0; ++ min_delay = 0; ++ } + +- delay = clamp(delay, BTRFS_DISCARD_MIN_DELAY_MSEC, +- BTRFS_DISCARD_MAX_DELAY_MSEC); ++ delay = clamp(delay, min_delay, BTRFS_DISCARD_MAX_DELAY_MSEC); + discard_ctl->delay_ms = delay; + + spin_unlock(&discard_ctl->lock); diff --git a/queue-6.2/btrfs-set-default-discard-iops_limit-to-1000.patch b/queue-6.2/btrfs-set-default-discard-iops_limit-to-1000.patch new file mode 100644 index 00000000000..4393980478a --- /dev/null +++ b/queue-6.2/btrfs-set-default-discard-iops_limit-to-1000.patch @@ -0,0 +1,41 @@ +From e9f59429b87d35cf23ae9ca19629bd686a1c0304 Mon Sep 17 00:00:00 2001 +From: Boris Burkov +Date: Wed, 5 Apr 2023 12:43:58 -0700 +Subject: btrfs: set default discard iops_limit to 1000 + +From: Boris Burkov + +commit e9f59429b87d35cf23ae9ca19629bd686a1c0304 upstream. + +Previously, the default was a relatively conservative 10. This results +in a 100ms delay, so with ~300 discards in a commit, it takes the full +30s till the next commit to finish the discards. On a workstation, this +results in the disk never going idle, wasting power/battery, etc. + +Set the default to 1000, which results in using the smallest possible +delay, currently, which is 1ms. This has shown to not pathologically +keep the disk busy by the original reporter. + +Link: https://lore.kernel.org/linux-btrfs/Y%2F+n1wS%2F4XAH7X1p@nz/ +Link: https://bugzilla.redhat.com/show_bug.cgi?id=2182228 +CC: stable@vger.kernel.org # 6.2+ +Reviewed-by: Neal Gompa +Reviewed-by: David Sterba +Signed-off-by: David Sterba +Signed-off-by: Greg Kroah-Hartman +--- + fs/btrfs/discard.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/btrfs/discard.c ++++ b/fs/btrfs/discard.c +@@ -60,7 +60,7 @@ + #define BTRFS_DISCARD_TARGET_MSEC (6 * 60 * 60UL * MSEC_PER_SEC) + #define BTRFS_DISCARD_MIN_DELAY_MSEC (1UL) + #define BTRFS_DISCARD_MAX_DELAY_MSEC (1000UL) +-#define BTRFS_DISCARD_MAX_IOPS (10U) ++#define BTRFS_DISCARD_MAX_IOPS (1000U) + + /* Monotonically decreasing minimum length filters after index 0 */ + static int discard_minlen[BTRFS_NR_DISCARD_LISTS] = { diff --git a/queue-6.2/iio-dac-ad5755-add-missing-fwnode_handle_put.patch b/queue-6.2/iio-dac-ad5755-add-missing-fwnode_handle_put.patch new file mode 100644 index 00000000000..3a60eff3f79 --- /dev/null +++ b/queue-6.2/iio-dac-ad5755-add-missing-fwnode_handle_put.patch @@ -0,0 +1,33 @@ +From ffef73791574b8da872cfbf881d8e3e9955fc130 Mon Sep 17 00:00:00 2001 +From: Liang He +Date: Wed, 22 Mar 2023 11:56:27 +0800 +Subject: iio: dac: ad5755: Add missing fwnode_handle_put() + +From: Liang He + +commit ffef73791574b8da872cfbf881d8e3e9955fc130 upstream. + +In ad5755_parse_fw(), we should add fwnode_handle_put() +when break out of the iteration device_for_each_child_node() +as it will automatically increase and decrease the refcounter. + +Fixes: 3ac27afefd5d ("iio:dac:ad5755: Switch to generic firmware properties and drop pdata") +Signed-off-by: Liang He +Link: https://lore.kernel.org/r/20230322035627.1856421-1-windhl@126.com +Cc: +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman +--- + drivers/iio/dac/ad5755.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/iio/dac/ad5755.c ++++ b/drivers/iio/dac/ad5755.c +@@ -802,6 +802,7 @@ static struct ad5755_platform_data *ad57 + return pdata; + + error_out: ++ fwnode_handle_put(pp); + devm_kfree(dev, pdata); + return NULL; + } diff --git a/queue-6.2/iio-light-tsl2772-fix-reading-proximity-diodes-from-device-tree.patch b/queue-6.2/iio-light-tsl2772-fix-reading-proximity-diodes-from-device-tree.patch new file mode 100644 index 00000000000..98bcd5102aa --- /dev/null +++ b/queue-6.2/iio-light-tsl2772-fix-reading-proximity-diodes-from-device-tree.patch @@ -0,0 +1,36 @@ +From b1cb00d51e361cf5af93649917d9790e1623647e Mon Sep 17 00:00:00 2001 +From: Brian Masney +Date: Mon, 3 Apr 2023 21:14:55 -0400 +Subject: iio: light: tsl2772: fix reading proximity-diodes from device tree + +From: Brian Masney + +commit b1cb00d51e361cf5af93649917d9790e1623647e upstream. + +tsl2772_read_prox_diodes() will correctly parse the properties from +device tree to determine which proximity diode(s) to read from, however +it didn't actually set this value on the struct tsl2772_settings. Let's +go ahead and fix that. + +Reported-by: Tom Rix +Link: https://lore.kernel.org/lkml/20230327120823.1369700-1-trix@redhat.com/ +Fixes: 94cd1113aaa0 ("iio: tsl2772: add support for reading proximity led settings from device tree") +Signed-off-by: Brian Masney +Link: https://lore.kernel.org/r/20230404011455.339454-1-bmasney@redhat.com +Cc: +Signed-off-by: Jonathan Cameron +Signed-off-by: Greg Kroah-Hartman +--- + drivers/iio/light/tsl2772.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/iio/light/tsl2772.c ++++ b/drivers/iio/light/tsl2772.c +@@ -601,6 +601,7 @@ static int tsl2772_read_prox_diodes(stru + return -EINVAL; + } + } ++ chip->settings.prox_diode = prox_diode_mask; + + return 0; + } diff --git a/queue-6.2/loongarch-check-unwind_error-in-arch_stack_walk.patch b/queue-6.2/loongarch-check-unwind_error-in-arch_stack_walk.patch new file mode 100644 index 00000000000..86c386ec994 --- /dev/null +++ b/queue-6.2/loongarch-check-unwind_error-in-arch_stack_walk.patch @@ -0,0 +1,79 @@ +From 370a3b8f58743eceb97c5256538d6048c26d2d03 Mon Sep 17 00:00:00 2001 +From: Tiezhu Yang +Date: Wed, 19 Apr 2023 12:07:27 +0800 +Subject: LoongArch: Check unwind_error() in arch_stack_walk() + +From: Tiezhu Yang + +commit 370a3b8f58743eceb97c5256538d6048c26d2d03 upstream. + +We can see the following messages with CONFIG_PROVE_LOCKING=y on +LoongArch: + + BUG: MAX_STACK_TRACE_ENTRIES too low! + turning off the locking correctness validator. + +This is because stack_trace_save() returns a big value after call +arch_stack_walk(), here is the call trace: + + save_trace() + stack_trace_save() + arch_stack_walk() + stack_trace_consume_entry() + +arch_stack_walk() should return immediately if unwind_next_frame() +failed, no need to do the useless loops to increase the value of c->len +in stack_trace_consume_entry(), then we can fix the above problem. + +Cc: stable@vger.kernel.org +Reported-by: Guenter Roeck +Link: https://lore.kernel.org/all/8a44ad71-68d2-4926-892f-72bfc7a67e2a@roeck-us.net/ +Signed-off-by: Tiezhu Yang +Signed-off-by: Huacai Chen +Signed-off-by: Greg Kroah-Hartman +--- + arch/loongarch/kernel/stacktrace.c | 2 +- + arch/loongarch/kernel/unwind.c | 1 + + arch/loongarch/kernel/unwind_prologue.c | 4 +++- + 3 files changed, 5 insertions(+), 2 deletions(-) + +--- a/arch/loongarch/kernel/stacktrace.c ++++ b/arch/loongarch/kernel/stacktrace.c +@@ -30,7 +30,7 @@ void arch_stack_walk(stack_trace_consume + + regs->regs[1] = 0; + for (unwind_start(&state, task, regs); +- !unwind_done(&state); unwind_next_frame(&state)) { ++ !unwind_done(&state) && !unwind_error(&state); unwind_next_frame(&state)) { + addr = unwind_get_return_address(&state); + if (!addr || !consume_entry(cookie, addr)) + break; +--- a/arch/loongarch/kernel/unwind.c ++++ b/arch/loongarch/kernel/unwind.c +@@ -28,5 +28,6 @@ bool default_next_frame(struct unwind_st + + } while (!get_stack_info(state->sp, state->task, info)); + ++ state->error = true; + return false; + } +--- a/arch/loongarch/kernel/unwind_prologue.c ++++ b/arch/loongarch/kernel/unwind_prologue.c +@@ -211,7 +211,7 @@ static bool next_frame(struct unwind_sta + pc = regs->csr_era; + + if (user_mode(regs) || !__kernel_text_address(pc)) +- return false; ++ goto out; + + state->first = true; + state->pc = pc; +@@ -226,6 +226,8 @@ static bool next_frame(struct unwind_sta + + } while (!get_stack_info(state->sp, state->task, info)); + ++out: ++ state->error = true; + return false; + } + diff --git a/queue-6.2/loongarch-fix-probing-of-the-crc32-feature.patch b/queue-6.2/loongarch-fix-probing-of-the-crc32-feature.patch new file mode 100644 index 00000000000..7312322930b --- /dev/null +++ b/queue-6.2/loongarch-fix-probing-of-the-crc32-feature.patch @@ -0,0 +1,136 @@ +From df830336045db1246d3245d3737fee9939c5f731 Mon Sep 17 00:00:00 2001 +From: Huacai Chen +Date: Tue, 18 Apr 2023 19:38:58 +0800 +Subject: LoongArch: Fix probing of the CRC32 feature + +From: Huacai Chen + +commit df830336045db1246d3245d3737fee9939c5f731 upstream. + +Not all LoongArch processors support CRC32 instructions. This feature +is indicated by CPUCFG1.CRC32 (Bit25) but it is wrongly defined in the +previous versions of the ISA manual (and so does in loongarch.h). The +CRC32 feature is set unconditionally now, so fix it. + +BTW, expose the CRC32 feature in /proc/cpuinfo. + +Cc: stable@vger.kernel.org +Signed-off-by: Huacai Chen +Signed-off-by: Greg Kroah-Hartman +--- + arch/loongarch/include/asm/cpu-features.h | 1 + arch/loongarch/include/asm/cpu.h | 40 +++++++++++++++--------------- + arch/loongarch/include/asm/loongarch.h | 2 - + arch/loongarch/kernel/cpu-probe.c | 7 ++++- + arch/loongarch/kernel/proc.c | 1 + 5 files changed, 30 insertions(+), 21 deletions(-) + +--- a/arch/loongarch/include/asm/cpu-features.h ++++ b/arch/loongarch/include/asm/cpu-features.h +@@ -42,6 +42,7 @@ + #define cpu_has_fpu cpu_opt(LOONGARCH_CPU_FPU) + #define cpu_has_lsx cpu_opt(LOONGARCH_CPU_LSX) + #define cpu_has_lasx cpu_opt(LOONGARCH_CPU_LASX) ++#define cpu_has_crc32 cpu_opt(LOONGARCH_CPU_CRC32) + #define cpu_has_complex cpu_opt(LOONGARCH_CPU_COMPLEX) + #define cpu_has_crypto cpu_opt(LOONGARCH_CPU_CRYPTO) + #define cpu_has_lvz cpu_opt(LOONGARCH_CPU_LVZ) +--- a/arch/loongarch/include/asm/cpu.h ++++ b/arch/loongarch/include/asm/cpu.h +@@ -78,25 +78,26 @@ enum cpu_type_enum { + #define CPU_FEATURE_FPU 3 /* CPU has FPU */ + #define CPU_FEATURE_LSX 4 /* CPU has LSX (128-bit SIMD) */ + #define CPU_FEATURE_LASX 5 /* CPU has LASX (256-bit SIMD) */ +-#define CPU_FEATURE_COMPLEX 6 /* CPU has Complex instructions */ +-#define CPU_FEATURE_CRYPTO 7 /* CPU has Crypto instructions */ +-#define CPU_FEATURE_LVZ 8 /* CPU has Virtualization extension */ +-#define CPU_FEATURE_LBT_X86 9 /* CPU has X86 Binary Translation */ +-#define CPU_FEATURE_LBT_ARM 10 /* CPU has ARM Binary Translation */ +-#define CPU_FEATURE_LBT_MIPS 11 /* CPU has MIPS Binary Translation */ +-#define CPU_FEATURE_TLB 12 /* CPU has TLB */ +-#define CPU_FEATURE_CSR 13 /* CPU has CSR */ +-#define CPU_FEATURE_WATCH 14 /* CPU has watchpoint registers */ +-#define CPU_FEATURE_VINT 15 /* CPU has vectored interrupts */ +-#define CPU_FEATURE_CSRIPI 16 /* CPU has CSR-IPI */ +-#define CPU_FEATURE_EXTIOI 17 /* CPU has EXT-IOI */ +-#define CPU_FEATURE_PREFETCH 18 /* CPU has prefetch instructions */ +-#define CPU_FEATURE_PMP 19 /* CPU has perfermance counter */ +-#define CPU_FEATURE_SCALEFREQ 20 /* CPU supports cpufreq scaling */ +-#define CPU_FEATURE_FLATMODE 21 /* CPU has flat mode */ +-#define CPU_FEATURE_EIODECODE 22 /* CPU has EXTIOI interrupt pin decode mode */ +-#define CPU_FEATURE_GUESTID 23 /* CPU has GuestID feature */ +-#define CPU_FEATURE_HYPERVISOR 24 /* CPU has hypervisor (running in VM) */ ++#define CPU_FEATURE_CRC32 6 /* CPU has CRC32 instructions */ ++#define CPU_FEATURE_COMPLEX 7 /* CPU has Complex instructions */ ++#define CPU_FEATURE_CRYPTO 8 /* CPU has Crypto instructions */ ++#define CPU_FEATURE_LVZ 9 /* CPU has Virtualization extension */ ++#define CPU_FEATURE_LBT_X86 10 /* CPU has X86 Binary Translation */ ++#define CPU_FEATURE_LBT_ARM 11 /* CPU has ARM Binary Translation */ ++#define CPU_FEATURE_LBT_MIPS 12 /* CPU has MIPS Binary Translation */ ++#define CPU_FEATURE_TLB 13 /* CPU has TLB */ ++#define CPU_FEATURE_CSR 14 /* CPU has CSR */ ++#define CPU_FEATURE_WATCH 15 /* CPU has watchpoint registers */ ++#define CPU_FEATURE_VINT 16 /* CPU has vectored interrupts */ ++#define CPU_FEATURE_CSRIPI 17 /* CPU has CSR-IPI */ ++#define CPU_FEATURE_EXTIOI 18 /* CPU has EXT-IOI */ ++#define CPU_FEATURE_PREFETCH 19 /* CPU has prefetch instructions */ ++#define CPU_FEATURE_PMP 20 /* CPU has perfermance counter */ ++#define CPU_FEATURE_SCALEFREQ 21 /* CPU supports cpufreq scaling */ ++#define CPU_FEATURE_FLATMODE 22 /* CPU has flat mode */ ++#define CPU_FEATURE_EIODECODE 23 /* CPU has EXTIOI interrupt pin decode mode */ ++#define CPU_FEATURE_GUESTID 24 /* CPU has GuestID feature */ ++#define CPU_FEATURE_HYPERVISOR 25 /* CPU has hypervisor (running in VM) */ + + #define LOONGARCH_CPU_CPUCFG BIT_ULL(CPU_FEATURE_CPUCFG) + #define LOONGARCH_CPU_LAM BIT_ULL(CPU_FEATURE_LAM) +@@ -104,6 +105,7 @@ enum cpu_type_enum { + #define LOONGARCH_CPU_FPU BIT_ULL(CPU_FEATURE_FPU) + #define LOONGARCH_CPU_LSX BIT_ULL(CPU_FEATURE_LSX) + #define LOONGARCH_CPU_LASX BIT_ULL(CPU_FEATURE_LASX) ++#define LOONGARCH_CPU_CRC32 BIT_ULL(CPU_FEATURE_CRC32) + #define LOONGARCH_CPU_COMPLEX BIT_ULL(CPU_FEATURE_COMPLEX) + #define LOONGARCH_CPU_CRYPTO BIT_ULL(CPU_FEATURE_CRYPTO) + #define LOONGARCH_CPU_LVZ BIT_ULL(CPU_FEATURE_LVZ) +--- a/arch/loongarch/include/asm/loongarch.h ++++ b/arch/loongarch/include/asm/loongarch.h +@@ -117,7 +117,7 @@ static inline u32 read_cpucfg(u32 reg) + #define CPUCFG1_EP BIT(22) + #define CPUCFG1_RPLV BIT(23) + #define CPUCFG1_HUGEPG BIT(24) +-#define CPUCFG1_IOCSRBRD BIT(25) ++#define CPUCFG1_CRC32 BIT(25) + #define CPUCFG1_MSGINT BIT(26) + + #define LOONGARCH_CPUCFG2 0x2 +--- a/arch/loongarch/kernel/cpu-probe.c ++++ b/arch/loongarch/kernel/cpu-probe.c +@@ -94,13 +94,18 @@ static void cpu_probe_common(struct cpui + c->options = LOONGARCH_CPU_CPUCFG | LOONGARCH_CPU_CSR | + LOONGARCH_CPU_TLB | LOONGARCH_CPU_VINT | LOONGARCH_CPU_WATCH; + +- elf_hwcap = HWCAP_LOONGARCH_CPUCFG | HWCAP_LOONGARCH_CRC32; ++ elf_hwcap = HWCAP_LOONGARCH_CPUCFG; + + config = read_cpucfg(LOONGARCH_CPUCFG1); + if (config & CPUCFG1_UAL) { + c->options |= LOONGARCH_CPU_UAL; + elf_hwcap |= HWCAP_LOONGARCH_UAL; + } ++ if (config & CPUCFG1_CRC32) { ++ c->options |= LOONGARCH_CPU_CRC32; ++ elf_hwcap |= HWCAP_LOONGARCH_CRC32; ++ } ++ + + config = read_cpucfg(LOONGARCH_CPUCFG2); + if (config & CPUCFG2_LAM) { +--- a/arch/loongarch/kernel/proc.c ++++ b/arch/loongarch/kernel/proc.c +@@ -76,6 +76,7 @@ static int show_cpuinfo(struct seq_file + if (cpu_has_fpu) seq_printf(m, " fpu"); + if (cpu_has_lsx) seq_printf(m, " lsx"); + if (cpu_has_lasx) seq_printf(m, " lasx"); ++ if (cpu_has_crc32) seq_printf(m, " crc32"); + if (cpu_has_complex) seq_printf(m, " complex"); + if (cpu_has_crypto) seq_printf(m, " crypto"); + if (cpu_has_lvz) seq_printf(m, " lvz"); diff --git a/queue-6.2/loongarch-mark-3-symbol-exports-as-non-gpl.patch b/queue-6.2/loongarch-mark-3-symbol-exports-as-non-gpl.patch new file mode 100644 index 00000000000..a9fc4147c3c --- /dev/null +++ b/queue-6.2/loongarch-mark-3-symbol-exports-as-non-gpl.patch @@ -0,0 +1,80 @@ +From dce5ea1d0f45fa612f5760b88614a3f32bc75e3f Mon Sep 17 00:00:00 2001 +From: Huacai Chen +Date: Tue, 18 Apr 2023 19:38:58 +0800 +Subject: LoongArch: Mark 3 symbol exports as non-GPL + +From: Huacai Chen + +commit dce5ea1d0f45fa612f5760b88614a3f32bc75e3f upstream. + +vm_map_base, empty_zero_page and invalid_pmd_table could be accessed +widely by some out-of-tree non-GPL but important file systems or drivers +(e.g. OpenZFS). Let's use EXPORT_SYMBOL() instead of EXPORT_SYMBOL_GPL() +to export them, so as to avoid build errors. + +1, Details about vm_map_base: + +This is a LoongArch-specific symbol and may be referenced through macros +PCI_IOBASE, VMALLOC_START and VMALLOC_END. + +2, Details about empty_zero_page: + +As it stands today, only 3 architectures export empty_zero_page as a GPL +symbol: IA64, LoongArch and MIPS. LoongArch gets the GPL export by +inheriting from MIPS, and the MIPS export was first introduced in commit +497d2adcbf50b ("[MIPS] Export empty_zero_page for sake of the ext4 +module."). The IA64 export was similar: commit a7d57ecf4216e ("[IA64] +Export three symbols for module use") did so for kvm. + +In both IA64 and MIPS, the export of empty_zero_page was done for +satisfying some in-kernel component built as module (kvm and ext4 +respectively), and given its reasonably low-level nature, GPL is a +reasonable choice. But looking at the bigger picture it is evident most +other architectures do not regard it as GPL, so in effect the symbol +probably should not be treated as such, in favor of consistency. + +3, Details about invalid_pmd_table: + +Keep consistency with invalid_pte_table and make it be possible by some +modules. + +Cc: stable@vger.kernel.org +Reviewed-by: WANG Xuerui +Signed-off-by: Huacai Chen +Signed-off-by: Greg Kroah-Hartman +--- + arch/loongarch/kernel/cpu-probe.c | 2 +- + arch/loongarch/mm/init.c | 4 ++-- + 2 files changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/loongarch/kernel/cpu-probe.c ++++ b/arch/loongarch/kernel/cpu-probe.c +@@ -60,7 +60,7 @@ static inline void set_elf_platform(int + + /* MAP BASE */ + unsigned long vm_map_base; +-EXPORT_SYMBOL_GPL(vm_map_base); ++EXPORT_SYMBOL(vm_map_base); + + static void cpu_probe_addrbits(struct cpuinfo_loongarch *c) + { +--- a/arch/loongarch/mm/init.c ++++ b/arch/loongarch/mm/init.c +@@ -41,7 +41,7 @@ + * don't have to care about aliases on other CPUs. + */ + unsigned long empty_zero_page, zero_page_mask; +-EXPORT_SYMBOL_GPL(empty_zero_page); ++EXPORT_SYMBOL(empty_zero_page); + EXPORT_SYMBOL(zero_page_mask); + + void setup_zero_pages(void) +@@ -270,7 +270,7 @@ pud_t invalid_pud_table[PTRS_PER_PUD] __ + #endif + #ifndef __PAGETABLE_PMD_FOLDED + pmd_t invalid_pmd_table[PTRS_PER_PMD] __page_aligned_bss; +-EXPORT_SYMBOL_GPL(invalid_pmd_table); ++EXPORT_SYMBOL(invalid_pmd_table); + #endif + pte_t invalid_pte_table[PTRS_PER_PTE] __page_aligned_bss; + EXPORT_SYMBOL(invalid_pte_table); diff --git a/queue-6.2/loongarch-module-set-section-addresses-to-0x0.patch b/queue-6.2/loongarch-module-set-section-addresses-to-0x0.patch new file mode 100644 index 00000000000..433703065de --- /dev/null +++ b/queue-6.2/loongarch-module-set-section-addresses-to-0x0.patch @@ -0,0 +1,40 @@ +From 93eb1215ed794a18ba8753e0654f069d58838966 Mon Sep 17 00:00:00 2001 +From: Huacai Chen +Date: Tue, 18 Apr 2023 19:38:58 +0800 +Subject: LoongArch: module: set section addresses to 0x0 + +From: Huacai Chen + +commit 93eb1215ed794a18ba8753e0654f069d58838966 upstream. + +These got*, plt* and .text.ftrace_trampoline sections specified for +LoongArch have non-zero addressses. Non-zero section addresses in a +relocatable ELF would confuse GDB when it tries to compute the section +offsets and it ends up printing wrong symbol addresses. Therefore, set +them to zero, which mirrors the change in commit 5d8591bc0fbaeb6ded +("arm64 module: set plt* section addresses to 0x0"). + +Cc: stable@vger.kernel.org +Reviewed-by: Guo Ren +Signed-off-by: Chong Qiao +Signed-off-by: Huacai Chen +Signed-off-by: Greg Kroah-Hartman +--- + arch/loongarch/include/asm/module.lds.h | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/loongarch/include/asm/module.lds.h ++++ b/arch/loongarch/include/asm/module.lds.h +@@ -2,8 +2,8 @@ + /* Copyright (C) 2020-2022 Loongson Technology Corporation Limited */ + SECTIONS { + . = ALIGN(4); +- .got : { BYTE(0) } +- .plt : { BYTE(0) } +- .plt.idx : { BYTE(0) } +- .ftrace_trampoline : { BYTE(0) } ++ .got 0 : { BYTE(0) } ++ .plt 0 : { BYTE(0) } ++ .plt.idx 0 : { BYTE(0) } ++ .ftrace_trampoline 0 : { BYTE(0) } + } diff --git a/queue-6.2/rust-kernel-mark-rust_fmt_argument-as-extern-c.patch b/queue-6.2/rust-kernel-mark-rust_fmt_argument-as-extern-c.patch new file mode 100644 index 00000000000..ed268835d09 --- /dev/null +++ b/queue-6.2/rust-kernel-mark-rust_fmt_argument-as-extern-c.patch @@ -0,0 +1,46 @@ +From c682e4c37d2b8ba3bde1125cbbea4ee88824b4e2 Mon Sep 17 00:00:00 2001 +From: David Gow +Date: Wed, 15 Feb 2023 06:47:35 +0800 +Subject: rust: kernel: Mark rust_fmt_argument as extern "C" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: David Gow + +commit c682e4c37d2b8ba3bde1125cbbea4ee88824b4e2 upstream. + +The rust_fmt_argument function is called from printk() to handle the %pA +format specifier. + +Since it's called from C, we should mark it extern "C" to make sure it's +ABI compatible. + +Cc: stable@vger.kernel.org +Fixes: 247b365dc8dc ("rust: add `kernel` crate") +Signed-off-by: David Gow +Reviewed-by: Gary Guo +Reviewed-by: Björn Roy Baron +Reviewed-by: Vincenzo Palazzo +[Applied `rustfmt`] +Signed-off-by: Miguel Ojeda +Signed-off-by: Greg Kroah-Hartman +--- + rust/kernel/print.rs | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/rust/kernel/print.rs ++++ b/rust/kernel/print.rs +@@ -18,7 +18,11 @@ use crate::bindings; + + // Called from `vsprintf` with format specifier `%pA`. + #[no_mangle] +-unsafe fn rust_fmt_argument(buf: *mut c_char, end: *mut c_char, ptr: *const c_void) -> *mut c_char { ++unsafe extern "C" fn rust_fmt_argument( ++ buf: *mut c_char, ++ end: *mut c_char, ++ ptr: *const c_void, ++) -> *mut c_char { + use fmt::Write; + // SAFETY: The C contract guarantees that `buf` is valid if it's less than `end`. + let mut w = unsafe { RawFormatter::from_ptrs(buf.cast(), end.cast()) }; diff --git a/queue-6.2/series b/queue-6.2/series index e7112d4d241..6b68bbbac1c 100644 --- a/queue-6.2/series +++ b/queue-6.2/series @@ -54,3 +54,13 @@ mtd-spi-nor-fix-memory-leak-when-using-debugfs_looku.patch pwm-zero-initialize-the-pwm_state-passed-to-driver-s-.get_state.patch revert-userfaultfd-don-t-fail-on-unrecognized-features.patch revert-acpica-events-support-fixed-pcie-wake-event.patch +iio-dac-ad5755-add-missing-fwnode_handle_put.patch +iio-light-tsl2772-fix-reading-proximity-diodes-from-device-tree.patch +alsa-hda-realtek-fix-mute-micmute-leds-for-a-hp-probook.patch +btrfs-set-default-discard-iops_limit-to-1000.patch +btrfs-reinterpret-async-discard-iops_limit-0-as-no-delay.patch +rust-kernel-mark-rust_fmt_argument-as-extern-c.patch +loongarch-module-set-section-addresses-to-0x0.patch +loongarch-check-unwind_error-in-arch_stack_walk.patch +loongarch-fix-probing-of-the-crc32-feature.patch +loongarch-mark-3-symbol-exports-as-non-gpl.patch