From: Wenjing Liu Date: Thu, 30 May 2024 21:13:02 +0000 (-0400) Subject: drm/amd/display: make ODM segment width of YCbCr422 two pixel aligned X-Git-Tag: v6.11-rc1~141^2~18^2~71 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e27ffc2fe8f41ef37c256a145292bc52ed304d9d;p=thirdparty%2Flinux.git drm/amd/display: make ODM segment width of YCbCr422 two pixel aligned [why] In YCbCr422 format hardware shares 1 set of chromas CbCr with 2 sets of lumas Y. Therefore each ODM segment needs to be two pixel aligned. The commit adds this missing hardwware requirement into ODM segment width decision logic. Reviewed-by: Dillon Varone Acked-by: Zaeem Mohamed Signed-off-by: Wenjing Liu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c index e047ea4ff3aa1..76b849bdd914b 100644 --- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c +++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c @@ -2089,13 +2089,20 @@ int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master, timing = &otg_master->stream->timing; count = resource_get_odm_slice_count(otg_master); h_active = timing->h_addressable + - timing->h_border_left + - timing->h_border_right; + timing->h_border_left + + timing->h_border_right; width = h_active / count; if (otg_master->stream_res.tg && otg_master->stream) - two_pixel_alignment_required = otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing); - + two_pixel_alignment_required = + otg_master->stream_res.tg->funcs->is_two_pixels_per_container(timing) || + /* + * 422 is sub-sampled horizontally. 1 set of chromas + * (Cb/Cr) is shared for 2 lumas (i.e 2 Y values). + * Therefore even if 422 is still 1 pixel per container, + * ODM segment width still needs to be 2 pixel aligned. + */ + timing->pixel_encoding == PIXEL_ENCODING_YCBCR422; if ((width % 2) && two_pixel_alignment_required) width++;