From: Greg Kroah-Hartman Date: Mon, 21 Oct 2024 08:24:31 +0000 (+0200) Subject: 5.15-stable patches X-Git-Tag: v5.10.228~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e30ce73985158764ab82114023697abada7adf2a;p=thirdparty%2Fkernel%2Fstable-queue.git 5.15-stable patches added patches: irqchip-gic-v4-don-t-allow-a-vmovp-on-a-dying-vpe.patch pinctrl-ocelot-fix-system-hang-on-level-based-interrupts.patch --- diff --git a/queue-5.15/irqchip-gic-v4-don-t-allow-a-vmovp-on-a-dying-vpe.patch b/queue-5.15/irqchip-gic-v4-don-t-allow-a-vmovp-on-a-dying-vpe.patch new file mode 100644 index 00000000000..54928592e00 --- /dev/null +++ b/queue-5.15/irqchip-gic-v4-don-t-allow-a-vmovp-on-a-dying-vpe.patch @@ -0,0 +1,103 @@ +From 1442ee0011983f0c5c4b92380e6853afb513841a Mon Sep 17 00:00:00 2001 +From: Marc Zyngier +Date: Wed, 2 Oct 2024 21:49:59 +0100 +Subject: irqchip/gic-v4: Don't allow a VMOVP on a dying VPE + +From: Marc Zyngier + +commit 1442ee0011983f0c5c4b92380e6853afb513841a upstream. + +Kunkun Jiang reported that there is a small window of opportunity for +userspace to force a change of affinity for a VPE while the VPE has already +been unmapped, but the corresponding doorbell interrupt still visible in +/proc/irq/. + +Plug the race by checking the value of vmapp_count, which tracks whether +the VPE is mapped ot not, and returning an error in this case. + +This involves making vmapp_count common to both GICv4.1 and its v4.0 +ancestor. + +Fixes: 64edfaa9a234 ("irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP") +Reported-by: Kunkun Jiang +Signed-off-by: Marc Zyngier +Signed-off-by: Thomas Gleixner +Cc: stable@vger.kernel.org +Link: https://lore.kernel.org/r/c182ece6-2ba0-ce4f-3404-dba7a3ab6c52@huawei.com +Link: https://lore.kernel.org/all/20241002204959.2051709-1-maz@kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/irqchip/irq-gic-v3-its.c | 18 ++++++++++++------ + include/linux/irqchip/arm-gic-v4.h | 4 +++- + 2 files changed, 15 insertions(+), 7 deletions(-) + +--- a/drivers/irqchip/irq-gic-v3-its.c ++++ b/drivers/irqchip/irq-gic-v3-its.c +@@ -789,8 +789,8 @@ static struct its_vpe *its_build_vmapp_c + its_encode_valid(cmd, desc->its_vmapp_cmd.valid); + + if (!desc->its_vmapp_cmd.valid) { ++ alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); + if (is_v4_1(its)) { +- alloc = !atomic_dec_return(&desc->its_vmapp_cmd.vpe->vmapp_count); + its_encode_alloc(cmd, alloc); + /* + * Unmapping a VPE is self-synchronizing on GICv4.1, +@@ -809,13 +809,13 @@ static struct its_vpe *its_build_vmapp_c + its_encode_vpt_addr(cmd, vpt_addr); + its_encode_vpt_size(cmd, LPI_NRBITS - 1); + ++ alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); ++ + if (!is_v4_1(its)) + goto out; + + vconf_addr = virt_to_phys(page_address(desc->its_vmapp_cmd.vpe->its_vm->vprop_page)); + +- alloc = !atomic_fetch_inc(&desc->its_vmapp_cmd.vpe->vmapp_count); +- + its_encode_alloc(cmd, alloc); + + /* +@@ -3811,6 +3811,13 @@ static int its_vpe_set_affinity(struct i + int from, cpu; + + /* ++ * Check if we're racing against a VPE being destroyed, for ++ * which we don't want to allow a VMOVP. ++ */ ++ if (!atomic_read(&vpe->vmapp_count)) ++ return -EINVAL; ++ ++ /* + * Changing affinity is mega expensive, so let's be as lazy as + * we can and only do it if we really have to. Also, if mapped + * into the proxy device, we need to move the doorbell +@@ -4446,9 +4453,8 @@ static int its_vpe_init(struct its_vpe * + raw_spin_lock_init(&vpe->vpe_lock); + vpe->vpe_id = vpe_id; + vpe->vpt_page = vpt_page; +- if (gic_rdists->has_rvpeid) +- atomic_set(&vpe->vmapp_count, 0); +- else ++ atomic_set(&vpe->vmapp_count, 0); ++ if (!gic_rdists->has_rvpeid) + vpe->vpe_proxy_event = -1; + + return 0; +--- a/include/linux/irqchip/arm-gic-v4.h ++++ b/include/linux/irqchip/arm-gic-v4.h +@@ -58,10 +58,12 @@ struct its_vpe { + bool enabled; + bool group; + } sgi_config[16]; +- atomic_t vmapp_count; + }; + }; + ++ /* Track the VPE being mapped */ ++ atomic_t vmapp_count; ++ + /* + * Ensures mutual exclusion between affinity setting of the + * vPE and vLPI operations using vpe->col_idx. diff --git a/queue-5.15/pinctrl-ocelot-fix-system-hang-on-level-based-interrupts.patch b/queue-5.15/pinctrl-ocelot-fix-system-hang-on-level-based-interrupts.patch new file mode 100644 index 00000000000..883b7098ba5 --- /dev/null +++ b/queue-5.15/pinctrl-ocelot-fix-system-hang-on-level-based-interrupts.patch @@ -0,0 +1,76 @@ +From 93b8ddc54507a227087c60a0013ed833b6ae7d3c Mon Sep 17 00:00:00 2001 +From: Sergey Matsievskiy +Date: Sat, 12 Oct 2024 13:57:43 +0300 +Subject: pinctrl: ocelot: fix system hang on level based interrupts + +From: Sergey Matsievskiy + +commit 93b8ddc54507a227087c60a0013ed833b6ae7d3c upstream. + +The current implementation only calls chained_irq_enter() and +chained_irq_exit() if it detects pending interrupts. + +``` +for (i = 0; i < info->stride; i++) { + uregmap_read(info->map, id_reg + 4 * i, ®); + if (!reg) + continue; + + chained_irq_enter(parent_chip, desc); +``` + +However, in case of GPIO pin configured in level mode and the parent +controller configured in edge mode, GPIO interrupt might be lowered by the +hardware. In the result, if the interrupt is short enough, the parent +interrupt is still pending while the GPIO interrupt is cleared; +chained_irq_enter() never gets called and the system hangs trying to +service the parent interrupt. + +Moving chained_irq_enter() and chained_irq_exit() outside the for loop +ensures that they are called even when GPIO interrupt is lowered by the +hardware. + +The similar code with chained_irq_enter() / chained_irq_exit() functions +wrapping interrupt checking loop may be found in many other drivers: +``` +grep -r -A 10 chained_irq_enter drivers/pinctrl +``` + +Cc: stable@vger.kernel.org +Signed-off-by: Sergey Matsievskiy +Reviewed-by: Alexandre Belloni +Link: https://lore.kernel.org/20241012105743.12450-2-matsievskiysv@gmail.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-ocelot.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/pinctrl/pinctrl-ocelot.c ++++ b/drivers/pinctrl/pinctrl-ocelot.c +@@ -1279,21 +1279,21 @@ static void ocelot_irq_handler(struct ir + unsigned int reg = 0, irq, i; + unsigned long irqs; + ++ chained_irq_enter(parent_chip, desc); ++ + for (i = 0; i < info->stride; i++) { + regmap_read(info->map, id_reg + 4 * i, ®); + if (!reg) + continue; + +- chained_irq_enter(parent_chip, desc); +- + irqs = reg; + + for_each_set_bit(irq, &irqs, + min(32U, info->desc->npins - 32 * i)) + generic_handle_domain_irq(chip->irq.domain, irq + 32 * i); +- +- chained_irq_exit(parent_chip, desc); + } ++ ++ chained_irq_exit(parent_chip, desc); + } + + static int ocelot_gpiochip_register(struct platform_device *pdev, diff --git a/queue-5.15/series b/queue-5.15/series index 6ad7f8af042..640ea6ca6bd 100644 --- a/queue-5.15/series +++ b/queue-5.15/series @@ -69,3 +69,5 @@ x86-resctrl-annotate-get_mem_config-functions-as-__init.patch x86-apic-always-explicitly-disarm-tsc-deadline-timer.patch x86-entry_32-do-not-clobber-user-eflags.zf.patch x86-entry_32-clear-cpu-buffers-after-register-restore-in-nmi-return.patch +pinctrl-ocelot-fix-system-hang-on-level-based-interrupts.patch +irqchip-gic-v4-don-t-allow-a-vmovp-on-a-dying-vpe.patch