From: Ingo Molnar Date: Thu, 10 Apr 2025 10:52:16 +0000 (+0200) Subject: x86/fpu: Clarify FPU context cacheline alignment X-Git-Tag: v6.16-rc1~195^2~28^2~21 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e3a52b67f54aa36ab21265eeea016460b5fe1c46;p=thirdparty%2Fkernel%2Flinux.git x86/fpu: Clarify FPU context cacheline alignment Suggested-by: Peter Zijlstra Signed-off-by: Ingo Molnar Cc: Andy Lutomirski Cc: Chang S. Bae Cc: Fenghua Yu Cc: H. Peter Anvin Cc: Linus Torvalds Cc: Oleg Nesterov Link: https://lore.kernel.org/r/Z_ejggklB5-IWB5W@gmail.com --- diff --git a/arch/x86/kernel/fpu/core.c b/arch/x86/kernel/fpu/core.c index d0a45f6492cb7..3a19877a314e3 100644 --- a/arch/x86/kernel/fpu/core.c +++ b/arch/x86/kernel/fpu/core.c @@ -607,7 +607,8 @@ int fpu_clone(struct task_struct *dst, unsigned long clone_flags, bool minimal, * We allocate the new FPU structure right after the end of the task struct. * task allocation size already took this into account. * - * This is safe because task_struct size is a multiple of cacheline size. + * This is safe because task_struct size is a multiple of cacheline size, + * thus x86_task_fpu() will always be cacheline aligned as well. */ struct fpu *dst_fpu = (void *)dst + sizeof(*dst);