From: Bjorn Andersson <quic_bjorande@quicinc.com>
Date: Fri, 11 Nov 2022 03:25:12 +0000 (-0800)
Subject: arm64: dts: qcom: sc8280xp: Add epss_l3 node
X-Git-Tag: v6.2-rc1~204^2~2^2~73
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e4f68d6c32aec8f3c7cdb07d18278e9a068a7eb0;p=thirdparty%2Flinux.git

arm64: dts: qcom: sc8280xp: Add epss_l3 node

Add a device node for the EPSS L3 frequency domain.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221111032515.3460-8-quic_bjorande@quicinc.com
---

diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index 0facb77ec91a1..2337ddfea8966 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -2260,6 +2260,16 @@
 			};
 		};
 
+		epss_l3: interconnect@18590000 {
+			compatible = "qcom,sc8280xp-epss-l3", "qcom,epss-l3";
+			reg = <0 0x18590000 0 0x1000>;
+
+			clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GCC_GPLL0>;
+			clock-names = "xo", "alternate";
+
+			#interconnect-cells = <1>;
+		};
+
 		cpufreq_hw: cpufreq@18591000 {
 			compatible = "qcom,sc8280xp-cpufreq-epss", "qcom,cpufreq-epss";
 			reg = <0 0x18591000 0 0x1000>,