From: Ilya Bakoulin Date: Fri, 11 Nov 2022 17:03:54 +0000 (-0500) Subject: drm/amd/display: Fix display corruption w/ VSR enable X-Git-Tag: v6.2-rc1~124^2~6^2~22 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e643cd384270fd3a4b66f65f15dafc8db0607adc;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: Fix display corruption w/ VSR enable [Why] Brief corruption is observed on hotplug/unplug with certain display configurations when VSR is enabled. [How] Work around the issue by avoiding 2to1 ODM when stream plane_count is 0. Reviewed-by: Dillon Varone Acked-by: Brian Chang Signed-off-by: Ilya Bakoulin Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c index 827eef7e17875..99ddd2232322c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn32/dcn32_resource.c @@ -1924,7 +1924,7 @@ int dcn32_populate_dml_pipes_from_context( pipes[pipe_cnt].pipe.dest.odm_combine_policy = dm_odm_combine_policy_dal; if (context->stream_count == 1 && - context->stream_status[0].plane_count <= 1 && + context->stream_status[0].plane_count == 1 && !dc_is_hdmi_signal(res_ctx->pipe_ctx[i].stream->signal) && is_h_timing_divisible_by_2(res_ctx->pipe_ctx[i].stream) && pipe->stream->timing.pix_clk_100hz * 100 > DCN3_2_VMIN_DISPCLK_HZ &&