From: Greg Kroah-Hartman Date: Tue, 18 Nov 2014 19:17:23 +0000 (-0800) Subject: 3.14-stable patches X-Git-Tag: v3.10.61~38 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e6a0af0f0534238fbbd76468e7a2237fabbbeba7;p=thirdparty%2Fkernel%2Fstable-queue.git 3.14-stable patches added patches: drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch drm-radeon-set-correct-ce-ram-size-for-cik.patch --- diff --git a/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch b/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch new file mode 100644 index 00000000000..3b9859a7de4 --- /dev/null +++ b/queue-3.14/drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch @@ -0,0 +1,28 @@ +From f0d7bfb9407fccb6499ec01c33afe43512a439a2 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Wed, 5 Nov 2014 17:14:32 -0500 +Subject: drm/radeon: add missing crtc unlock when setting up the MC + +From: Alex Deucher + +commit f0d7bfb9407fccb6499ec01c33afe43512a439a2 upstream. + +Need to unlock the crtc after updating the blanking state. + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/evergreen.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -2573,6 +2573,7 @@ void evergreen_mc_stop(struct radeon_dev + WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1); + tmp |= EVERGREEN_CRTC_BLANK_DATA_EN; + WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp); ++ WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0); + } + } else { + tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]); diff --git a/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch b/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch new file mode 100644 index 00000000000..4eeae35debc --- /dev/null +++ b/queue-3.14/drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch @@ -0,0 +1,119 @@ +From 8efe82ca908400785253c8f0dfcf301e6bd93488 Mon Sep 17 00:00:00 2001 +From: Alex Deucher +Date: Mon, 3 Nov 2014 09:57:46 -0500 +Subject: drm/radeon: make sure mode init is complete in bandwidth_update + +From: Alex Deucher + +commit 8efe82ca908400785253c8f0dfcf301e6bd93488 upstream. + +The power management code calls into the display code for +certain things. If certain power management sysfs attributes +are called before the driver has finished initializing all of +the hardware we can run into problems with uninitialized +modesetting state. Add a check to make sure modesetting +init has completed to the bandwidth update callbacks to +fix this. Can be triggered by the tlp and laptop start +up scripts depending on the timing. + +bugs: +https://bugzilla.kernel.org/show_bug.cgi?id=83611 +https://bugs.freedesktop.org/show_bug.cgi?id=85771 + +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/cik.c | 3 +++ + drivers/gpu/drm/radeon/evergreen.c | 3 +++ + drivers/gpu/drm/radeon/r100.c | 3 +++ + drivers/gpu/drm/radeon/rs600.c | 3 +++ + drivers/gpu/drm/radeon/rs690.c | 3 +++ + drivers/gpu/drm/radeon/rv515.c | 3 +++ + drivers/gpu/drm/radeon/si.c | 3 +++ + 7 files changed, 21 insertions(+) + +--- a/drivers/gpu/drm/radeon/cik.c ++++ b/drivers/gpu/drm/radeon/cik.c +@@ -8893,6 +8893,9 @@ void dce8_bandwidth_update(struct radeon + u32 num_heads = 0, lb_size; + int i; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + for (i = 0; i < rdev->num_crtc; i++) { +--- a/drivers/gpu/drm/radeon/evergreen.c ++++ b/drivers/gpu/drm/radeon/evergreen.c +@@ -2362,6 +2362,9 @@ void evergreen_bandwidth_update(struct r + u32 num_heads = 0, lb_size; + int i; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + for (i = 0; i < rdev->num_crtc; i++) { +--- a/drivers/gpu/drm/radeon/r100.c ++++ b/drivers/gpu/drm/radeon/r100.c +@@ -3219,6 +3219,9 @@ void r100_bandwidth_update(struct radeon + uint32_t pixel_bytes1 = 0; + uint32_t pixel_bytes2 = 0; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + if (rdev->mode_info.crtcs[0]->base.enabled) { +--- a/drivers/gpu/drm/radeon/rs600.c ++++ b/drivers/gpu/drm/radeon/rs600.c +@@ -890,6 +890,9 @@ void rs600_bandwidth_update(struct radeo + u32 d1mode_priority_a_cnt, d2mode_priority_a_cnt; + /* FIXME: implement full support */ + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + if (rdev->mode_info.crtcs[0]->base.enabled) +--- a/drivers/gpu/drm/radeon/rs690.c ++++ b/drivers/gpu/drm/radeon/rs690.c +@@ -579,6 +579,9 @@ void rs690_bandwidth_update(struct radeo + u32 d1mode_priority_a_cnt, d1mode_priority_b_cnt; + u32 d2mode_priority_a_cnt, d2mode_priority_b_cnt; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + if (rdev->mode_info.crtcs[0]->base.enabled) +--- a/drivers/gpu/drm/radeon/rv515.c ++++ b/drivers/gpu/drm/radeon/rv515.c +@@ -1276,6 +1276,9 @@ void rv515_bandwidth_update(struct radeo + struct drm_display_mode *mode0 = NULL; + struct drm_display_mode *mode1 = NULL; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + if (rdev->mode_info.crtcs[0]->base.enabled) +--- a/drivers/gpu/drm/radeon/si.c ++++ b/drivers/gpu/drm/radeon/si.c +@@ -2227,6 +2227,9 @@ void dce6_bandwidth_update(struct radeon + u32 num_heads = 0, lb_size; + int i; + ++ if (!rdev->mode_info.mode_config_initialized) ++ return; ++ + radeon_update_display_priority(rdev); + + for (i = 0; i < rdev->num_crtc; i++) { diff --git a/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch b/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch new file mode 100644 index 00000000000..bf1d4b721b7 --- /dev/null +++ b/queue-3.14/drm-radeon-set-correct-ce-ram-size-for-cik.patch @@ -0,0 +1,34 @@ +From dc4edad6530a9b7b66c3d905e2bc06021a05dcad Mon Sep 17 00:00:00 2001 +From: Jammy Zhou +Date: Mon, 3 Nov 2014 08:58:20 -0500 +Subject: drm/radeon: set correct CE ram size for CIK + +From: Jammy Zhou + +commit dc4edad6530a9b7b66c3d905e2bc06021a05dcad upstream. + +CE ram size is 32k/0k/0k for GFX/CS0/CS1 with CIK + +Ported from amdgpu driver. + +Signed-off-by: Jammy Zhou +Signed-off-by: Alex Deucher +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/gpu/drm/radeon/cik.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/gpu/drm/radeon/cik.c ++++ b/drivers/gpu/drm/radeon/cik.c +@@ -3936,8 +3936,8 @@ static int cik_cp_gfx_start(struct radeo + /* init the CE partitions. CE only used for gfx on CIK */ + radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2)); + radeon_ring_write(ring, PACKET3_BASE_INDEX(CE_PARTITION_BASE)); +- radeon_ring_write(ring, 0xc000); +- radeon_ring_write(ring, 0xc000); ++ radeon_ring_write(ring, 0x8000); ++ radeon_ring_write(ring, 0x8000); + + /* setup clear context state */ + radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0)); diff --git a/queue-3.14/series b/queue-3.14/series index c0455f6d3d0..eb779368682 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -35,3 +35,6 @@ mac80211-properly-flush-delayed-scan-work-on-interface-removal.patch mac80211-use-secondary-channel-offset-ie-also-beacons-during-csa.patch mac80211-schedule-the-actual-switch-of-the-station-before-csa-count-0.patch mac80211-fix-use-after-free-in-defragmentation.patch +drm-radeon-set-correct-ce-ram-size-for-cik.patch +drm-radeon-make-sure-mode-init-is-complete-in-bandwidth_update.patch +drm-radeon-add-missing-crtc-unlock-when-setting-up-the-mc.patch