From: Greg Kroah-Hartman Date: Mon, 2 May 2022 23:05:21 +0000 (+0200) Subject: 5.4-stable patches X-Git-Tag: v5.4.192~36 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e8cf6aa5fb1225691db424977b4e2b8d990b3f08;p=thirdparty%2Fkernel%2Fstable-queue.git 5.4-stable patches added patches: x86-cpu-load-microcode-during-restore_processor_state.patch --- diff --git a/queue-5.4/series b/queue-5.4/series index bd17479efca..1fe9940fab0 100644 --- a/queue-5.4/series +++ b/queue-5.4/series @@ -71,3 +71,4 @@ x86-__memcpy_flushcache-fix-wrong-alignment-if-size-.patch cifs-destage-any-unwritten-data-to-the-server-before.patch drivers-net-hippi-fix-deadlock-in-rr_close.patch net-ethernet-stmmac-fix-write-to-sgmii_adapter_base.patch +x86-cpu-load-microcode-during-restore_processor_state.patch diff --git a/queue-5.4/x86-cpu-load-microcode-during-restore_processor_state.patch b/queue-5.4/x86-cpu-load-microcode-during-restore_processor_state.patch new file mode 100644 index 00000000000..4bc40ab4c77 --- /dev/null +++ b/queue-5.4/x86-cpu-load-microcode-during-restore_processor_state.patch @@ -0,0 +1,119 @@ +From f9e14dbbd454581061c736bf70bf5cbb15ac927c Mon Sep 17 00:00:00 2001 +From: Borislav Petkov +Date: Tue, 19 Apr 2022 09:52:41 -0700 +Subject: x86/cpu: Load microcode during restore_processor_state() + +From: Borislav Petkov + +commit f9e14dbbd454581061c736bf70bf5cbb15ac927c upstream. + +When resuming from system sleep state, restore_processor_state() +restores the boot CPU MSRs. These MSRs could be emulated by microcode. +If microcode is not loaded yet, writing to emulated MSRs leads to +unchecked MSR access error: + + ... + PM: Calling lapic_suspend+0x0/0x210 + unchecked MSR access error: WRMSR to 0x10f (tried to write 0x0...0) at rIP: ... (native_write_msr) + Call Trace: + + ? restore_processor_state + x86_acpi_suspend_lowlevel + acpi_suspend_enter + suspend_devices_and_enter + pm_suspend.cold + state_store + kobj_attr_store + sysfs_kf_write + kernfs_fop_write_iter + new_sync_write + vfs_write + ksys_write + __x64_sys_write + do_syscall_64 + entry_SYSCALL_64_after_hwframe + RIP: 0033:0x7fda13c260a7 + +To ensure microcode emulated MSRs are available for restoration, load +the microcode on the boot CPU before restoring these MSRs. + + [ Pawan: write commit message and productize it. ] + +Fixes: e2a1256b17b1 ("x86/speculation: Restore speculation related MSRs during S3 resume") +Reported-by: Kyle D. Pelton +Signed-off-by: Borislav Petkov +Signed-off-by: Pawan Gupta +Tested-by: Kyle D. Pelton +Cc: stable@vger.kernel.org +Link: https://bugzilla.kernel.org/show_bug.cgi?id=215841 +Link: https://lore.kernel.org/r/4350dfbf785cd482d3fafa72b2b49c83102df3ce.1650386317.git.pawan.kumar.gupta@linux.intel.com +Signed-off-by: Greg Kroah-Hartman +--- + arch/x86/include/asm/microcode.h | 2 ++ + arch/x86/kernel/cpu/microcode/core.c | 6 +++--- + arch/x86/power/cpu.c | 8 ++++++++ + 3 files changed, 13 insertions(+), 3 deletions(-) + +--- a/arch/x86/include/asm/microcode.h ++++ b/arch/x86/include/asm/microcode.h +@@ -133,11 +133,13 @@ extern void load_ucode_ap(void); + void reload_early_microcode(void); + extern bool get_builtin_firmware(struct cpio_data *cd, const char *name); + extern bool initrd_gone; ++void microcode_bsp_resume(void); + #else + static inline int __init microcode_init(void) { return 0; }; + static inline void __init load_ucode_bsp(void) { } + static inline void load_ucode_ap(void) { } + static inline void reload_early_microcode(void) { } ++static inline void microcode_bsp_resume(void) { } + static inline bool + get_builtin_firmware(struct cpio_data *cd, const char *name) { return false; } + #endif +--- a/arch/x86/kernel/cpu/microcode/core.c ++++ b/arch/x86/kernel/cpu/microcode/core.c +@@ -772,9 +772,9 @@ static struct subsys_interface mc_cpu_in + }; + + /** +- * mc_bp_resume - Update boot CPU microcode during resume. ++ * microcode_bsp_resume - Update boot CPU microcode during resume. + */ +-static void mc_bp_resume(void) ++void microcode_bsp_resume(void) + { + int cpu = smp_processor_id(); + struct ucode_cpu_info *uci = ucode_cpu_info + cpu; +@@ -786,7 +786,7 @@ static void mc_bp_resume(void) + } + + static struct syscore_ops mc_syscore_ops = { +- .resume = mc_bp_resume, ++ .resume = microcode_bsp_resume, + }; + + static int mc_cpu_starting(unsigned int cpu) +--- a/arch/x86/power/cpu.c ++++ b/arch/x86/power/cpu.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + + #ifdef CONFIG_X86_32 + __visible unsigned long saved_context_ebx; +@@ -263,6 +264,13 @@ static void notrace __restore_processor_ + x86_platform.restore_sched_clock_state(); + mtrr_bp_restore(); + perf_restore_debug_store(); ++ ++ microcode_bsp_resume(); ++ ++ /* ++ * This needs to happen after the microcode has been updated upon resume ++ * because some of the MSRs are "emulated" in microcode. ++ */ + msr_restore_context(ctxt); + } +