From: Eduardo Habkost Date: Fri, 3 Oct 2014 19:39:50 +0000 (-0300) Subject: target-i386: Don't enable nested VMX by default X-Git-Tag: v2.2.0-rc0~5^2~1 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e93abc147fa628650bdbe7fd57f27462ca40a3c2;p=thirdparty%2Fqemu.git target-i386: Don't enable nested VMX by default TCG doesn't support VMX, and nested VMX is not enabled by default in the KVM kernel module. So, there's no reason to have VMX enabled by default on the core2duo and coreduo CPU models, today. Even the newer Intel CPU model definitions don't have it enabled. In this case, we need machine-type compat code, as people may be running the older machine-types on hosts that had VMX nesting enabled. Signed-off-by: Eduardo Habkost Signed-off-by: Andreas Färber --- diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 8d63553bc1f..751f3e0265c 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -304,6 +304,8 @@ static void pc_init_pci(MachineState *machine) static void pc_compat_2_1(MachineState *machine) { + x86_cpu_compat_set_features("coreduo", FEAT_1_ECX, CPUID_EXT_VMX, 0); + x86_cpu_compat_set_features("core2duo", FEAT_1_ECX, CPUID_EXT_VMX, 0); } static void pc_compat_2_0(MachineState *machine) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index d2484746c37..c5ee2509546 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -283,6 +283,8 @@ static void pc_q35_init(MachineState *machine) static void pc_compat_2_1(MachineState *machine) { + x86_cpu_compat_set_features("coreduo", FEAT_1_ECX, CPUID_EXT_VMX, 0); + x86_cpu_compat_set_features("core2duo", FEAT_1_ECX, CPUID_EXT_VMX, 0); } static void pc_compat_2_0(MachineState *machine) diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 0c41b929e6e..b7318320778 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -718,10 +718,10 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_PSE36 | CPUID_VME | CPUID_ACPI | CPUID_SS, /* Missing: CPUID_EXT_DTES64, CPUID_EXT_DSCPL, CPUID_EXT_EST, - * CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM */ + * CPUID_EXT_TM2, CPUID_EXT_XTPR, CPUID_EXT_PDCM, CPUID_EXT_VMX */ .features[FEAT_1_ECX] = CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_SSSE3 | - CPUID_EXT_VMX | CPUID_EXT_CX16, + CPUID_EXT_CX16, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, .features[FEAT_8000_0001_ECX] = @@ -802,9 +802,9 @@ static X86CPUDefinition builtin_x86_defs[] = { CPUID_MTRR | CPUID_CLFLUSH | CPUID_MCA | CPUID_ACPI | CPUID_SS, /* Missing: CPUID_EXT_EST, CPUID_EXT_TM2 , CPUID_EXT_XTPR, - * CPUID_EXT_PDCM */ + * CPUID_EXT_PDCM, CPUID_EXT_VMX */ .features[FEAT_1_ECX] = - CPUID_EXT_SSE3 | CPUID_EXT_MONITOR | CPUID_EXT_VMX, + CPUID_EXT_SSE3 | CPUID_EXT_MONITOR, .features[FEAT_8000_0001_EDX] = CPUID_EXT2_NX, .xlevel = 0x80000008,