From: Sung Joon Kim Date: Thu, 4 Apr 2024 19:03:58 +0000 (-0400) Subject: drm/amd/display: Enable Z10 flag for IPS FSM X-Git-Tag: v6.10-rc1~148^2~19^2~52 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=e9e4b3a05b017d031f58239a7ca458337d35ed9b;p=thirdparty%2Fkernel%2Flinux.git drm/amd/display: Enable Z10 flag for IPS FSM [why] IPS FSM requires Z10 flag to be enabled to do save and restore the registers properly. [how] Enable Z10 and use the correct function to determine Z10 capability Reviewed-by: Nicholas Kazlauskas Acked-by: Rodrigo Siqueira Signed-off-by: Sung Joon Kim Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c index cc1a44a890b5f..b29d7d47552b3 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c @@ -758,7 +758,7 @@ static const struct dc_debug_options debug_defaults_drv = { //must match enable_single_display_2to1_odm_policy to support dynamic ODM transitions .enable_double_buffered_dsc_pg_support = true, .enable_dp_dig_pixel_rate_div_policy = 1, - .disable_z10 = true, + .disable_z10 = false, .ignore_pg = true, .psp_disabled_wa = true, .ips2_eval_delay_us = 2000, @@ -1722,7 +1722,7 @@ static bool dcn351_validate_bandwidth(struct dc *dc, return out; DC_FP_START(); - dcn351_decide_zstate_support(dc, context); + dcn35_decide_zstate_support(dc, context); DC_FP_END(); return out;