From: Vaishnav Achath Date: Mon, 25 Nov 2024 10:49:47 +0000 (+0530) Subject: mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35X X-Git-Tag: v2025.07-rc2~22 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ea2c6df478550fd5e4a412412cea30c986883808;p=thirdparty%2Fu-boot.git mtd: spi-nor-core: Fixup SNOR_F_IO_MODE_EN_VOLATILE for MT35X MT35XU512ABA has only BFPT and 4-Byte Address Instruction Table in SFDP. commit bebdc237507c ("mtd: spi-nor: Parse SFDP SCCR Map") added checks in spi_nor_octal_dtr_enable() to bail out if the 22nd DWORD in SCCR does not indicate DTR Octal Mode Enable, since MT35XU512ABA device supports octal DTR mode, add this property in SFDP fixup. Signed-off-by: Vaishnav Achath Signed-off-by: Prasanth Babu Mantena Reviewed-by: Udit Kumar --- diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index 87a3099eeaf..c03136c1c20 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -4135,6 +4135,12 @@ static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor, params->rdsr_dummy = 8; params->rdsr_addr_nbytes = 0; + /* + * SCCR Map 22nd DWORD does not indicate DTR Octal Mode Enable + * for MT35XU512ABA but is actually supported by device. + */ + nor->flags |= SNOR_F_IO_MODE_EN_VOLATILE; + /* * The BFPT quad enable field is set to a reserved value so the quad * enable function is ignored by spi_nor_parse_bfpt(). Make sure we