From: Greg Kroah-Hartman Date: Mon, 20 Jun 2022 12:05:07 +0000 (+0200) Subject: 4.19-stable patches X-Git-Tag: v5.4.200~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ea887c621a824fa95ae6f89482637353afac78bd;p=thirdparty%2Fkernel%2Fstable-queue.git 4.19-stable patches added patches: powerpc-mm-switch-obsolete-dssall-to-.long.patch risc-v-fix-barrier-use-in-vdso-processor.h.patch --- diff --git a/queue-4.19/powerpc-mm-switch-obsolete-dssall-to-.long.patch b/queue-4.19/powerpc-mm-switch-obsolete-dssall-to-.long.patch new file mode 100644 index 00000000000..5e567e063f6 --- /dev/null +++ b/queue-4.19/powerpc-mm-switch-obsolete-dssall-to-.long.patch @@ -0,0 +1,142 @@ +From foo@baz Mon Jun 20 02:04:36 PM CEST 2022 +From: Alexey Kardashevskiy +Date: Tue, 21 Dec 2021 16:59:03 +1100 +Subject: powerpc/mm: Switch obsolete dssall to .long + +From: Alexey Kardashevskiy + +commit d51f86cfd8e378d4907958db77da3074f6dce3ba upstream. + +The dssall ("Data Stream Stop All") instruction is obsolete altogether +with other Data Cache Instructions since ISA 2.03 (year 2006). + +LLVM IAS does not support it but PPC970 seems to be using it. +This switches dssall to .long as there is no much point in fixing LLVM. + +Signed-off-by: Alexey Kardashevskiy +Signed-off-by: Michael Ellerman +Link: https://lore.kernel.org/r/20211221055904.555763-6-aik@ozlabs.ru +[sudip: adjust context] +Signed-off-by: Sudip Mukherjee +Signed-off-by: Greg Kroah-Hartman +--- + arch/powerpc/include/asm/ppc-opcode.h | 2 ++ + arch/powerpc/kernel/idle_6xx.S | 2 +- + arch/powerpc/kernel/l2cr_6xx.S | 6 +++--- + arch/powerpc/kernel/swsusp_32.S | 2 +- + arch/powerpc/kernel/swsusp_asm64.S | 2 +- + arch/powerpc/mm/mmu_context.c | 2 +- + arch/powerpc/platforms/powermac/cache.S | 4 ++-- + 7 files changed, 11 insertions(+), 9 deletions(-) + +--- a/arch/powerpc/include/asm/ppc-opcode.h ++++ b/arch/powerpc/include/asm/ppc-opcode.h +@@ -207,6 +207,7 @@ + #define PPC_INST_ICBT 0x7c00002c + #define PPC_INST_ICSWX 0x7c00032d + #define PPC_INST_ICSWEPX 0x7c00076d ++#define PPC_INST_DSSALL 0x7e00066c + #define PPC_INST_ISEL 0x7c00001e + #define PPC_INST_ISEL_MASK 0xfc00003e + #define PPC_INST_LDARX 0x7c0000a8 +@@ -424,6 +425,7 @@ + __PPC_RA(a) | __PPC_RB(b)) + #define PPC_DCBZL(a, b) stringify_in_c(.long PPC_INST_DCBZL | \ + __PPC_RA(a) | __PPC_RB(b)) ++#define PPC_DSSALL stringify_in_c(.long PPC_INST_DSSALL) + #define PPC_LQARX(t, a, b, eh) stringify_in_c(.long PPC_INST_LQARX | \ + ___PPC_RT(t) | ___PPC_RA(a) | \ + ___PPC_RB(b) | __PPC_EH(eh)) +--- a/arch/powerpc/kernel/idle_6xx.S ++++ b/arch/powerpc/kernel/idle_6xx.S +@@ -133,7 +133,7 @@ BEGIN_FTR_SECTION + END_FTR_SECTION_IFCLR(CPU_FTR_NO_DPM) + mtspr SPRN_HID0,r4 + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + sync + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + CURRENT_THREAD_INFO(r9, r1) +--- a/arch/powerpc/kernel/l2cr_6xx.S ++++ b/arch/powerpc/kernel/l2cr_6xx.S +@@ -108,7 +108,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L2CR) + + /* Stop DST streams */ + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + sync + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + +@@ -305,7 +305,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_L3CR) + isync + + /* Stop DST streams */ +- DSSALL ++ PPC_DSSALL + sync + + /* Get the current enable bit of the L3CR into r4 */ +@@ -414,7 +414,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_L3CR) + _GLOBAL(__flush_disable_L1) + /* Stop pending alitvec streams and memory accesses */ + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + sync + +--- a/arch/powerpc/kernel/swsusp_32.S ++++ b/arch/powerpc/kernel/swsusp_32.S +@@ -181,7 +181,7 @@ _GLOBAL(swsusp_arch_resume) + #ifdef CONFIG_ALTIVEC + /* Stop pending alitvec streams and memory accesses */ + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + #endif + sync +--- a/arch/powerpc/kernel/swsusp_asm64.S ++++ b/arch/powerpc/kernel/swsusp_asm64.S +@@ -143,7 +143,7 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_LPAR + _GLOBAL(swsusp_arch_resume) + /* Stop pending alitvec streams and memory accesses */ + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + sync + +--- a/arch/powerpc/mm/mmu_context.c ++++ b/arch/powerpc/mm/mmu_context.c +@@ -83,7 +83,7 @@ void switch_mm_irqs_off(struct mm_struct + * context + */ + if (cpu_has_feature(CPU_FTR_ALTIVEC)) +- asm volatile ("dssall"); ++ asm volatile (PPC_DSSALL); + + if (new_on_cpu) + radix_kvm_prefetch_workaround(next); +--- a/arch/powerpc/platforms/powermac/cache.S ++++ b/arch/powerpc/platforms/powermac/cache.S +@@ -53,7 +53,7 @@ flush_disable_75x: + + /* Stop DST streams */ + BEGIN_FTR_SECTION +- DSSALL ++ PPC_DSSALL + sync + END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + +@@ -201,7 +201,7 @@ flush_disable_745x: + isync + + /* Stop prefetch streams */ +- DSSALL ++ PPC_DSSALL + sync + + /* Disable L2 prefetching */ diff --git a/queue-4.19/risc-v-fix-barrier-use-in-vdso-processor.h.patch b/queue-4.19/risc-v-fix-barrier-use-in-vdso-processor.h.patch new file mode 100644 index 00000000000..5c4a462c1ce --- /dev/null +++ b/queue-4.19/risc-v-fix-barrier-use-in-vdso-processor.h.patch @@ -0,0 +1,55 @@ +From foo@baz Mon Jun 20 01:58:17 PM CEST 2022 +From: Randy Dunlap +Date: Mon, 16 Nov 2020 17:39:51 -0800 +Subject: RISC-V: fix barrier() use in + +From: Randy Dunlap + +commit 30aca1bacb398dec6c1ed5eeca33f355bd7b6203 upstream. + +riscv's uses barrier() so it should include + + +Fixes this build error: + CC [M] drivers/net/ethernet/emulex/benet/be_main.o +In file included from ./include/vdso/processor.h:10, + from ./arch/riscv/include/asm/processor.h:11, + from ./include/linux/prefetch.h:15, + from drivers/net/ethernet/emulex/benet/be_main.c:14: +./arch/riscv/include/asm/vdso/processor.h: In function 'cpu_relax': +./arch/riscv/include/asm/vdso/processor.h:14:2: error: implicit declaration of function 'barrier' [-Werror=implicit-function-declaration] + 14 | barrier(); + +This happens with a total of 5 networking drivers -- they all use +. + +rv64 allmodconfig now builds cleanly after this patch. + +Fixes fallout from: +815f0ddb346c ("include/linux/compiler*.h: make compiler-*.h mutually exclusive") + +Fixes: ad5d1122b82f ("riscv: use vDSO common flow to reduce the latency of the time-related functions") +Reported-by: Andreas Schwab +Signed-off-by: Randy Dunlap +Acked-by: Arvind Sankar +Signed-off-by: Palmer Dabbelt +Reviewed-by: Nick Desaulniers +Signed-off-by: Palmer Dabbelt +[sudip: change in old path] +Signed-off-by: Sudip Mukherjee +Signed-off-by: Greg Kroah-Hartman +--- + arch/riscv/include/asm/processor.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/riscv/include/asm/processor.h ++++ b/arch/riscv/include/asm/processor.h +@@ -30,6 +30,8 @@ + + #ifndef __ASSEMBLY__ + ++#include ++ + struct task_struct; + struct pt_regs; + diff --git a/queue-4.19/series b/queue-4.19/series index d8586f177e8..5871f045265 100644 --- a/queue-4.19/series +++ b/queue-4.19/series @@ -222,3 +222,5 @@ ext4-add-reserved-gdt-blocks-check.patch virtio-pci-remove-wrong-address-verification-in-vp_del_vqs.patch net-openvswitch-fix-misuse-of-the-cached-connection-on-tuple-changes.patch net-openvswitch-fix-leak-of-nested-actions.patch +risc-v-fix-barrier-use-in-vdso-processor.h.patch +powerpc-mm-switch-obsolete-dssall-to-.long.patch