From: Benjamin Herrenschmidt Date: Mon, 21 Mar 2016 12:52:39 +0000 (+0100) Subject: ppc: Add dummy CIABR SPR X-Git-Tag: v2.6.0-rc0~12^2~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=eb5ceb4d389b1b34b210baf9fa49b48bacb2538b;p=thirdparty%2Fqemu.git ppc: Add dummy CIABR SPR We should implement HW breakpoint/watchpoint, qemu supports them... Signed-off-by: Benjamin Herrenschmidt Reviewed-by: Thomas Huth Reviewed-by: David Gibson Signed-off-by: David Gibson --- diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index a3c4fb112a3..29c48600d95 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1393,6 +1393,7 @@ static inline int cpu_mmu_index (CPUPPCState *env, bool ifetch) #define SPR_PSPB (0x09F) #define SPR_DAWR (0x0B4) #define SPR_RPR (0x0BA) +#define SPR_CIABR (0x0BB) #define SPR_DAWRX (0x0BC) #define SPR_HFSCR (0x0BE) #define SPR_VRSAVE (0x100) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index bd62e3be028..37c4fb53026 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7589,6 +7589,11 @@ static void gen_spr_book3s_207_dbg(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_DAWRX, 0x00000000); + spr_register_kvm_hv(env, SPR_CIABR, "CIABR", + SPR_NOACCESS, SPR_NOACCESS, + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + KVM_REG_PPC_CIABR, 0x00000000); } static void gen_spr_970_dbg(CPUPPCState *env)