From: Nicholas Piggin <npiggin@gmail.com>
Date: Tue, 20 Jun 2023 13:13:21 +0000 (+1000)
Subject: target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts
X-Git-Tag: v8.1.0-rc0~45^2~12
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=eb701f30120d899bdaa202c3cbd9219055fccae0;p=thirdparty%2Fqemu.git

target/ppc: Add ISA v3.1 LEV indication in SRR1 for system call interrupts

System call interrupts in ISA v3.1 CPUs add a LEV indication in SRR1
that corresponds with the LEV field of the instruction that caused the
interrupt.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---

diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 2a0070cf437..8e2fec3551b 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -1591,6 +1591,10 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
             vhc->hypercall(cpu->vhyp, cpu);
             return;
         }
+        if (env->insns_flags2 & PPC2_ISA310) {
+            /* ISAv3.1 puts LEV into SRR1 */
+            msr |= lev << 20;
+        }
         if (lev == 1) {
             new_msr |= (target_ulong)MSR_HVB;
         }