From: Uros Bizjak Date: Mon, 2 May 2016 09:49:39 +0000 (+0200) Subject: predicates.md (nonimm_ssenomem_operand): New predicate. X-Git-Tag: basepoints/gcc-8~7224 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ebae28e91ba5a5df5b59e2b114deeb080ec82b27;p=thirdparty%2Fgcc.git predicates.md (nonimm_ssenomem_operand): New predicate. * config/i386/predicates.md (nonimm_ssenomem_operand): New predicate. (register_mixssei387nonimm_operand): Remove predicate. * config/i386/i386.md (*fop__comm): Merge from *fop__comm_mixed and *fop__comm_i387. Disable unsupported alternatives using "enabled" attribute. Also check X87_ENABLE_ARITH for TARGET_MIX_SSE_I387 alternatives. (*fop__1): Merge from *fop__1_mixed and *fop__1_i387. Disable unsupported alternatives using "enabled" attribute. Use nonimm_ssenomem_operand as operand 1 predicate. Also check X87_ENABLE_ARITH for TARGET_MIX_SSE_I387 alternatives. * config/i386/predicates.md (nonimm_ssenomem_operand): New predicate. (register_mixssei387nonimm_operand): Remove predicate. From-SVN: r235727 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7ea67aaf2ae6..3982115c31ca 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2016-05-02 Uros Bizjak + + * config/i386/predicates.md (nonimm_ssenomem_operand): New predicate. + (register_mixssei387nonimm_operand): Remove predicate. + * config/i386/i386.md (*fop__comm): Merge from + *fop__comm_mixed and *fop__comm_i387. Disable unsupported + alternatives using "enabled" attribute. Also check X87_ENABLE_ARITH + for TARGET_MIX_SSE_I387 alternatives. + (*fop__1): Merge from *fop__1_mixed and *fop__1_i387. + Disable unsupported alternatives using "enabled" attribute. Use + nonimm_ssenomem_operand as operand 1 predicate. Also check + X87_ENABLE_ARITH for TARGET_MIX_SSE_I387 alternatives. + * config/i386/predicates.md (nonimm_ssenomem_operand): New predicate. + (register_mixssei387nonimm_operand): Remove predicate. + 2016-05-02 Richard Sandiford * tree.c (cst_and_fits_in_hwi): Simplify. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index b2d3b72123b3..f4d33c595511 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -13989,12 +13989,13 @@ ;; Gcc is slightly more smart about handling normal two address instructions ;; so use special patterns for add and mull. -(define_insn "*fop__comm_mixed" +(define_insn "*fop__comm" [(set (match_operand:MODEF 0 "register_operand" "=f,x,v") (match_operator:MODEF 3 "binary_fp_operator" [(match_operand:MODEF 1 "nonimmediate_operand" "%0,0,v") (match_operand:MODEF 2 "nonimmediate_operand" "fm,xm,vm")]))] - "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH + "((SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + || (TARGET_80387 && X87_ENABLE_ARITH (mode))) && COMMUTATIVE_ARITH_P (operands[3]) && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "* return output_387_binary_op (insn, operands);" @@ -14010,25 +14011,17 @@ (set_attr "prefix" "orig,orig,vex") (set_attr "mode" "") (set (attr "enabled") - (cond [(eq_attr "alternative" "0") - (symbol_ref "TARGET_MIX_SSE_I387") - ] - (const_string "*")))]) - -(define_insn "*fop__comm_i387" - [(set (match_operand:MODEF 0 "register_operand" "=f") - (match_operator:MODEF 3 "binary_fp_operator" - [(match_operand:MODEF 1 "nonimmediate_operand" "%0") - (match_operand:MODEF 2 "nonimmediate_operand" "fm")]))] - "TARGET_80387 && X87_ENABLE_ARITH (mode) - && COMMUTATIVE_ARITH_P (operands[3]) - && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (if_then_else (match_operand:MODEF 3 "mult_operator") - (const_string "fmul") - (const_string "fop"))) - (set_attr "mode" "")]) + (if_then_else + (match_test ("SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")) + (if_then_else + (eq_attr "alternative" "0") + (symbol_ref "TARGET_MIX_SSE_I387 + && X87_ENABLE_ARITH (mode)") + (const_string "*")) + (if_then_else + (eq_attr "alternative" "0") + (symbol_ref "true") + (symbol_ref "false"))))]) (define_insn "*rcpsf2_sse" [(set (match_operand:SF 0 "register_operand" "=x") @@ -14042,14 +14035,15 @@ (set_attr "prefix" "maybe_vex") (set_attr "mode" "SF")]) -(define_insn "*fop__1_mixed" +(define_insn "*fop__1" [(set (match_operand:MODEF 0 "register_operand" "=f,f,x,v") (match_operator:MODEF 3 "binary_fp_operator" [(match_operand:MODEF 1 - "register_mixssei387nonimm_operand" "0,fm,0,v") + "nonimm_ssenomem_operand" "0,fm,0,v") (match_operand:MODEF 2 - "nonimmediate_operand" "fm,0,xm,vm")]))] - "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH + "nonimmediate_operand" "fm,0,xm,vm")]))] + "((SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) + || (TARGET_80387 && X87_ENABLE_ARITH (mode))) && !COMMUTATIVE_ARITH_P (operands[3]) && !(MEM_P (operands[1]) && MEM_P (operands[2]))" "* return output_387_binary_op (insn, operands);" @@ -14065,27 +14059,17 @@ (set_attr "prefix" "orig,orig,orig,vex") (set_attr "mode" "") (set (attr "enabled") - (cond [(eq_attr "alternative" "0,1") - (symbol_ref "TARGET_MIX_SSE_I387") - ] - (const_string "*")))]) - -;; This pattern is not fully shadowed by the pattern above. -(define_insn "*fop__1_i387" - [(set (match_operand:MODEF 0 "register_operand" "=f,f") - (match_operator:MODEF 3 "binary_fp_operator" - [(match_operand:MODEF 1 "nonimmediate_operand" "0,fm") - (match_operand:MODEF 2 "nonimmediate_operand" "fm,0")]))] - "TARGET_80387 && X87_ENABLE_ARITH (mode) - && !(SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH) - && !COMMUTATIVE_ARITH_P (operands[3]) - && !(MEM_P (operands[1]) && MEM_P (operands[2]))" - "* return output_387_binary_op (insn, operands);" - [(set (attr "type") - (if_then_else (match_operand:MODEF 3 "div_operator") - (const_string "fdiv") - (const_string "fop"))) - (set_attr "mode" "")]) + (if_then_else + (match_test ("SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH")) + (if_then_else + (eq_attr "alternative" "0,1") + (symbol_ref "TARGET_MIX_SSE_I387 + && X87_ENABLE_ARITH (mode)") + (const_string "*")) + (if_then_else + (eq_attr "alternative" "0,1") + (symbol_ref "true") + (symbol_ref "false"))))]) ;; ??? Add SSE splitters for these! (define_insn "*fop__2_i387" @@ -14137,8 +14121,7 @@ (match_operand:SF 1 "nonimmediate_operand" "fm,0")) (match_operand:DF 2 "register_operand" "0,f")]))] "TARGET_80387 && X87_ENABLE_ARITH (DFmode) - && !(TARGET_SSE2 && TARGET_SSE_MATH) - && !(MEM_P (operands[1]) && MEM_P (operands[2]))" + && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:DF 3 "mult_operator") @@ -14156,7 +14139,7 @@ (float_extend:DF (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] "TARGET_80387 && X87_ENABLE_ARITH (DFmode) - && !(TARGET_SSE2 && TARGET_SSE_MATH)" + && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:DF 3 "mult_operator") @@ -14175,7 +14158,7 @@ (float_extend:DF (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))] "TARGET_80387 && X87_ENABLE_ARITH (DFmode) - && !(TARGET_SSE2 && TARGET_SSE_MATH)" + && !(SSE_FLOAT_MODE_P (DFmode) && TARGET_SSE_MATH)" "* return output_387_binary_op (insn, operands);" [(set (attr "type") (cond [(match_operand:DF 3 "mult_operator") diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index d15dae457941..fe9bb2bc6953 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -121,11 +121,14 @@ (match_operand 0 "nonmemory_operand") (match_operand 0 "general_operand"))) -;; Match register operands, include memory operand for TARGET_MIX_SSE_I387. -(define_predicate "register_mixssei387nonimm_operand" - (if_then_else (match_test "TARGET_MIX_SSE_I387") - (match_operand 0 "nonimmediate_operand") - (match_operand 0 "register_operand"))) +;; Match nonimmediate operands, but exclude memory operands +;; for TARGET_SSE_MATH if TARGET_MIX_SSE_I387 is not enabled. +(define_predicate "nonimm_ssenomem_operand" + (if_then_else + (and (match_test "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH") + (not (match_test "TARGET_MIX_SSE_I387 && X87_ENABLE_ARITH (mode)"))) + (match_operand 0 "register_operand") + (match_operand 0 "nonimmediate_operand"))) ;; Match register operands, include memory operand for TARGET_SSE4_1. (define_predicate "register_sse4nonimm_operand"