From: Cerion Armour-Brown <cerion@valgrind.org>
Date: Tue, 13 Sep 2005 13:34:09 +0000 (+0000)
Subject: a couple more simple altivec insns
X-Git-Tag: svn/VALGRIND_3_1_1^2~103
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ec5cbf4e6314ab62f6af81c7efa251833d36db18;p=thirdparty%2Fvalgrind.git

a couple more simple altivec insns
 - vandc, vnor, vsel



git-svn-id: svn://svn.valgrind.org/vex/trunk@1388
---

diff --git a/VEX/priv/guest-ppc32/toIR.c b/VEX/priv/guest-ppc32/toIR.c
index 372df22571..f611e40ce4 100644
--- a/VEX/priv/guest-ppc32/toIR.c
+++ b/VEX/priv/guest-ppc32/toIR.c
@@ -5308,8 +5308,9 @@ static Bool dis_av_logic ( UInt theInstr )
 
    case 0x444: // vandc (And, AV p148)
       DIP("vandc v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
-      DIP(" => not implemented\n");
-      return False;
+      putVReg( vD_addr, binop(Iop_AndV128, mkexpr(vA),
+			      unop(Iop_NotV128, mkexpr(vB))) );
+      break;
 
    case 0x484: // vor (Or, AV p217)
       DIP("vor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
@@ -5323,8 +5324,9 @@ static Bool dis_av_logic ( UInt theInstr )
 
    case 0x504: // vnor (Nor, AV p216)
       DIP("vnor v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr);
-      DIP(" => not implemented\n");
-      return False;
+      putVReg( vD_addr,
+         unop(Iop_NotV128, binop(Iop_OrV128, mkexpr(vA), mkexpr(vB))) );
+      break;
 
    default:
       vex_printf("dis_av_logic(PPC32)(opc2=0x%x)\n", opc2);
@@ -5603,6 +5605,13 @@ static Bool dis_av_permute ( UInt theInstr )
 
    UChar SIMM_8 = extend_s_5to8(SIMM_5);
 
+   IRTemp vA = newTemp(Ity_V128);
+   IRTemp vB = newTemp(Ity_V128);
+   IRTemp vC = newTemp(Ity_V128);
+   assign( vA, getVReg(vA_addr));
+   assign( vB, getVReg(vB_addr));
+   assign( vC, getVReg(vC_addr));
+
    if (opc1 != 0x4) {
       vex_printf("dis_av_permute(PPC32)(instr)\n");
       return False;
@@ -5611,8 +5620,11 @@ static Bool dis_av_permute ( UInt theInstr )
    switch (opc2) {
    case 0x2A: // vsel (Conditional Select, AV p238)
       DIP("vsel v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
-      DIP(" => not implemented\n");
-      return False;
+      /* vD = (vA & ~vC) | (vB & vC) */
+      putVReg( vD_addr, binop(Iop_OrV128,
+         binop(Iop_AndV128, mkexpr(vA), unop(Iop_NotV128, mkexpr(vC))),
+         binop(Iop_AndV128, mkexpr(vB), mkexpr(vC))) );
+      return True;
      
    case 0x2B: // vperm (Permute, AV p218)
       DIP("vperm v%d,v%d,v%d,v%d\n", vD_addr, vA_addr, vB_addr, vC_addr);
diff --git a/VEX/priv/host-ppc32/isel.c b/VEX/priv/host-ppc32/isel.c
index 7968fbb01c..8471fdb2f5 100644
--- a/VEX/priv/host-ppc32/isel.c
+++ b/VEX/priv/host-ppc32/isel.c
@@ -2822,6 +2822,7 @@ static HReg iselVecExpr_wrk ( ISelEnv* env, IRExpr* e )
    }
 
    if (e->tag == Iex_Get) {
+      /* Guest state vectors are 16byte aligned, so don't need to worry here */
       HReg dst = newVRegV(env);
       addInstr(env,
                PPC32Instr_AvLdSt( True/*load*/, 16, dst,
@@ -3393,6 +3394,7 @@ static void iselStmt ( ISelEnv* env, IRStmt* stmt )
          return;
      }
      if (ty == Ity_V128) {
+         /* Guest state vectors are 16byte aligned, so don't need to worry here */
          HReg v_src = iselVecExpr(env, stmt->Ist.Put.data);
          PPC32AMode* am_addr  = PPC32AMode_IR(stmt->Ist.Put.offset, GuestStatePtr);
          addInstr(env, PPC32Instr_AvLdSt(False/*store*/, 16, v_src, am_addr));