From: Andrew Pinski Date: Mon, 22 Jul 2024 23:18:47 +0000 (-0700) Subject: aarch64: Use iorn and andn standard pattern names for scalar modes X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ecbfaf0056d5932634e0bf15c60d2790a77f7016;p=thirdparty%2Fgcc.git aarch64: Use iorn and andn standard pattern names for scalar modes Since r15-1890-gf379596e0ba99d, these are the new optabs. So let's use these names for them. These will be used to generate during expand from gimple in the next few patches. Built and tested for aarch64-linux-gnu with no regressions. gcc/ChangeLog: * config/aarch64/aarch64.md (*_one_cmpl3): Rename to ... (n3): This. (*_one_cmplsidi3_ze): Rename to ... (*nsidi3_ze): This. Signed-off-by: Andrew Pinski --- diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 94ff0eefa77f..ed29127dafbe 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5069,18 +5069,18 @@ ;; Binary logical operators negating one operand, i.e. (a & !b), (a | !b). -(define_insn "*_one_cmpl3" +(define_insn "n3" [(set (match_operand:GPI 0 "register_operand") - (NLOGICAL:GPI (not:GPI (match_operand:GPI 1 "register_operand")) - (match_operand:GPI 2 "register_operand")))] + (NLOGICAL:GPI (not:GPI (match_operand:GPI 2 "register_operand")) + (match_operand:GPI 1 "register_operand")))] "" {@ [ cons: =0 , 1 , 2 ; attrs: type , arch ] - [ r , r , r ; logic_reg , * ] \t%0, %2, %1 - [ w , w , w ; neon_logic , simd ] \t%0., %2., %1. + [ r , r , r ; logic_reg , * ] \t%0, %1, %2 + [ w , w , w ; neon_logic , simd ] \t%0., %1., %2. } ) -(define_insn "*_one_cmplsidi3_ze" +(define_insn "*nsidi3_ze" [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (NLOGICAL:SI (not:SI (match_operand:SI 1 "register_operand" "r"))