From: Alistair Francis Date: Mon, 19 Apr 2021 06:18:06 +0000 (+1000) Subject: target/riscv: Add ePMP support for the Ibex CPU X-Git-Tag: v6.1.0-rc0~129^2~15 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ed6eebaaafd3b96cc4ef3dcc30eb3a26c20ece57;p=thirdparty%2Fqemu.git target/riscv: Add ePMP support for the Ibex CPU The physical Ibex CPU has ePMP support and it's enabled for the OpenTitan machine so let's enable ePMP support for the Ibex CPU in QEMU. Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Message-id: d426baabab0c9361ed2e989dbe416e417a551fd1.1618812899.git.alistair.francis@wdc.com --- diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 66787d019cf..4bf6a006368 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -202,6 +202,7 @@ static void rv32_ibex_cpu_init(Object *obj) set_misa(env, RV32 | RVI | RVM | RVC | RVU); set_priv_version(env, PRIV_VERSION_1_10_0); qdev_prop_set_bit(DEVICE(obj), "mmu", false); + qdev_prop_set_bit(DEVICE(obj), "x-epmp", true); } static void rv32_imafcu_nommu_cpu_init(Object *obj)