From: Ville Syrjälä Date: Thu, 12 Jun 2025 14:50:13 +0000 (+0300) Subject: drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail() X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ed9434c6b4f3d9aa89c9ba6853849b9751a2b1f3;p=thirdparty%2Flinux.git drm/i915/dsb: Use intel_dsb_ins_align() in intel_dsb_align_tail() If the free_post is not QW aligned we don't have to memset the extra DW needed to make it so, as the only way that can happen is via intel_dsb_reg_write_indexed() which already makes sure the next DW is zeroed. Not a big deal, but this is more consistent how all the other stuff operates that puts instructions into the DSB buffer, and we'll get a few more of those soon. Reviewed-by: Uma Shankar Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20250612145018.8735-2-ville.syrjala@linux.intel.com --- diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c index 4252eba7f7d0d..96baef5d5b1ad 100644 --- a/drivers/gpu/drm/i915/display/intel_dsb.c +++ b/drivers/gpu/drm/i915/display/intel_dsb.c @@ -527,6 +527,8 @@ static void intel_dsb_align_tail(struct intel_dsb *dsb) { u32 aligned_tail, tail; + intel_dsb_ins_align(dsb); + tail = dsb->free_pos * 4; aligned_tail = ALIGN(tail, CACHELINE_BYTES);