From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Thu, 4 Dec 2025 19:07:46 +0000 (-0800)
Subject: Merge tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=edd2b9832d604a234b60a4910c7496f351cd1e12;p=thirdparty%2Flinux.git

Merge tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux

Pull mtd updates from Miquel Raynal:
 "Core MTD changes:

   - We must ignore error -ENOENT from parsers on subpartitions which is
     a legitimate return value

   - PM support is added to the intel-dg driver

  Raw NAND changes:

   - The major change in this is the support for the Allwinner H616 NAND
     controller, which lead to numerous changes and cleanups in the
     driver.

   - Another notable change in this driver is the use of field_get() and
     field_prep(), but since the global support for this helpers is
     going to be merged in the same release as we start using these
     helpers, we undefine them in the first place to avoid warnings.

   - Marvell drivers layout handling changes have also landed, they fix
     previous definitions and abuses that have been made previously,
     which implied to relax the ECC parameters validation in the core a
     bit.

   - The Cadence NAND controller driver gets NV-DDR interface support.

  SPI NAND changes:

   - Support for FudanMicro FM25S01BI3 and ESMT F50L1G41LC is added.

  SPI NOR changes:

   - Fix SMPT parsing for S25FS-S flash family. They report variable
     dummy cycles for reads. This results in the default of 0 being
     used. This works for other Infineon chips, but not for the S25FS-S
     family. They need 8 dummy cycles. Add fixup hooks to specify that.
     Also add fixup hooks to fix incorrect map ID data in SFDP.

   - Add support for a bunch of Winbond flashes. Their block protection
     information is not discoverable, so they need to have an entry in
     the flash tables to describe that.

   - Some cleanups for Micron flash support.

   - Add support for Micron mt35xu01gbba.

   - Some SPI controllers like the Intel one on the PCI bus do not
     support the read CR opcode (0x35). Do not use the opcode if the
     controller does not support it.

  Aside from these main changes, there is the usual load of API updates,
  kdoc fixes, potential memory leaks fixes, etc"

* tag 'mtd/for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (51 commits)
  mtd: sm_ftl: Fix typo in comment in sm_read_lba
  mtd: sm_ftl: Replace deprecated strncpy with sysfs_emit in sm_attr_show
  mtd: lpddr_cmds: fix signed shifts in lpddr_cmds
  mtd: docg3: fix kernel-doc warnings
  mtd: spinand: add support for FudanMicro FM25S01BI3
  mtd: rawnand: renesas: Handle devm_pm_runtime_enable() errors
  mtd: nand: realtek-ecc: Fix Kconfig dependencies
  mtd: rawnand: sunxi: #undef field_{get,prep}() before local definition
  mailmap: update Pratyush Yadav's email address
  mtd: spi-nor: core: Check read CR support
  mtd: spi-nor: micron-st: add TODO for fixing mt35xu02gcba
  mtd: spi-nor: micron-st: add mt35xu01gbba support
  mtd: spi-nor: micron-st: use SFDP of mt35xu512aba
  mtd: spi-nor: micron-st: move set_octal_dtr to late_init()
  mtd: spi-nor: micron-st: rename the die_late_init functions
  mtd: spinand: esmt: add support for F50L1G41LC
  mtd: rawnand: lpc32xx_slc: Convert to use devm_gpiod_get_optional()
  mtd: mtdpart: ignore error -ENOENT from parsers on subpartitions
  mtd: maps: pcmciamtd: fix potential memory leak in pcmciamtd_detach()
  mtd: spi-nor: spansion: SMPT fixups for S25FS-S
  ...
---

edd2b9832d604a234b60a4910c7496f351cd1e12
diff --cc drivers/mtd/nand/spi/fmsh.c
index c2b9a8c113cbe,43689b91dc28d..f417955f7d1c5
--- a/drivers/mtd/nand/spi/fmsh.c
+++ b/drivers/mtd/nand/spi/fmsh.c
@@@ -58,8 -120,18 +120,18 @@@ static const struct spinand_info fmsh_s
  		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
  					      &write_cache_variants,
  					      &update_cache_variants),
 -		     SPINAND_HAS_QE_BIT,
 +		     0,
  		     SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)),
+ 	SPINAND_INFO("FM25S01BI3",
+ 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xd4),
+ 		     NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ 		     NAND_ECCREQ(8, 512),
+ 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ 					      &write_cache_variants,
+ 					      &update_cache_variants),
+ 		     SPINAND_HAS_QE_BIT,
+ 		     SPINAND_ECCINFO(&fm25s01bi3_ooblayout,
+ 				      fm25s01bi3_ecc_get_status)),
  };
  
  static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = {