From: Wang Pengcheng Date: Wed, 20 Dec 2023 17:32:59 +0000 (-0700) Subject: [PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition X-Git-Tag: basepoints/gcc-15~3384 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=eef65d60a8bb2e9328fd9d2b6cd869618be4f08e;p=thirdparty%2Fgcc.git [PATCH] RISC-V: Fix RISCV_FUSE_ZEXTWS fusion condition The condition is RISCV_FUSE_ZEXTH, which is a mistake. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix condition. --- diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index d9b45f17a1b8..c6784a221274 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -8096,8 +8096,9 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) if (!riscv_macro_fusion_p ()) return false; - if (simple_sets_p && (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) || - riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH))) + if (simple_sets_p + && (riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) + || riscv_fusion_enabled_p (RISCV_FUSE_ZEXTWS))) { /* We are trying to match the following: prev (slli) == (set (reg:DI rD)