From: Aurelien Jarno <aurelien@aurel32.net>
Date: Tue, 3 Sep 2013 06:27:38 +0000 (+0200)
Subject: tcg/optimize: improve known-zero bits for 32-bit ops
X-Git-Tag: v2.0.0-rc0~80^2~10
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f096dc96188378bc2bcd80683490ca386b0c1683;p=thirdparty%2Fqemu.git

tcg/optimize: improve known-zero bits for 32-bit ops

The shl_i32 op might set some bits of the unused 32 high bits of the
mask. Fix that by clearing the unused 32 high bits for all 32-bit ops
except load/store which operate on tl values.

Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Richard Henderson <rth@twiddle.net>
---

diff --git a/tcg/optimize.c b/tcg/optimize.c
index 7838be2c50b..1cf017aab8c 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -783,6 +783,12 @@ static TCGArg *tcg_constant_folding(TCGContext *s, uint16_t *tcg_opc_ptr,
             break;
         }
 
+        /* 32-bit ops (non 64-bit ops and non load/store ops) generate 32-bit
+           results */
+        if (!(tcg_op_defs[op].flags & (TCG_OPF_CALL_CLOBBER | TCG_OPF_64BIT))) {
+            mask &= 0xffffffffu;
+        }
+
         if (mask == 0) {
             assert(def->nb_oargs == 1);
             s->gen_opc_buf[op_index] = op_to_movi(op);