From: Philippe Mathieu-Daudé Date: Tue, 7 Feb 2023 08:02:05 +0000 (+0100) Subject: hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F X-Git-Tag: v8.0.0-rc0~68^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f16c27a52d6e408328539db6772f2d7a138e5b16;p=thirdparty%2Fqemu.git hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F This SoC uses a Cortex-M4F. QEMU only implements a M4, which is good enough. Add a TODO note in case the M4F is added. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Delevoryas Reviewed-by: Cédric Le Goater Signed-off-by: Cédric Le Goater --- diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index 5c794c24209..649b3b13c13 100644 --- a/hw/arm/aspeed_ast10x0.c +++ b/hw/arm/aspeed_ast10x0.c @@ -420,7 +420,7 @@ static void aspeed_soc_ast1030_class_init(ObjectClass *klass, void *data) dc->realize = aspeed_soc_ast1030_realize; sc->name = "ast1030-a1"; - sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); + sc->cpu_type = ARM_CPU_TYPE_NAME("cortex-m4"); /* TODO cortex-m4f */ sc->silicon_rev = AST1030_A1_SILICON_REV; sc->sram_size = 0xc0000; sc->secsram_size = 0x40000; /* 256 * KiB */