From: Jeff Law <jlaw@ventanamicro.com>
Date: Mon, 20 Oct 2025 22:31:20 +0000 (-0600)
Subject: Fix minor RISC-V testsuite failure
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f2b5e49c5968ef8fa28f9e24a0866437d6289b53;p=thirdparty%2Fgcc.git

Fix minor RISC-V testsuite failure

This fixes reduc-8 yet again.  This time the required "a2" moved to the other source operand of the add.  So the regexp is further expanded to allow add anyreg,anyreg,a2 or add anyreg,a2,anyreg.

gcc/testsuite
	* gcc.target/riscv/rvv/autovec/reduc/reduc-8.c: Adjust expected output.
---

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
index 1e5dc236a18..15a1d636453 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/reduc/reduc-8.c
@@ -12,4 +12,4 @@ add_loop (int *x, int n, int res)
   return res;
 }
 
-/* { dg-final { scan-assembler-times {add\s+[a-x0-9]+,\s*[a-x0-9]+,a2} 1 } } */
+/* { dg-final { scan-assembler-times {add\s+[a-x0-9]+,\s*(?:a2,\s*[a-x0-9]+|[a-x0-9]+,\s*a2)} 1 } } */