From: Zhao Liu <zhao1.liu@intel.com>
Date: Tue, 26 Nov 2024 16:30:45 +0000 (+0800)
Subject: hw/timer/hpet: Fix comment about capabilities register
X-Git-Tag: v10.0.0-rc0~104^2~9
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f2ccc4149363ed52444efc975ed838d6757c775c;p=thirdparty%2Fqemu.git

hw/timer/hpet: Fix comment about capabilities register

HPETState.capability stores the emulated value for "general capabilities
and id register" instead of "main counter register".

Fix the comment to accurately reflect this.

Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Michael Tokarev <mjt@tls.msk.ru>
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
---

diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 2a45410c0da..1c8c6c69ef5 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -736,7 +736,7 @@ static void hpet_realize(DeviceState *dev, Error **errp)
         timer->state = s;
     }
 
-    /* 64-bit main counter; LegacyReplacementRoute. */
+    /* 64-bit General Capabilities and ID Register; LegacyReplacementRoute. */
     s->capability = 0x8086a001ULL;
     s->capability |= (s->num_timers - 1) << HPET_ID_NUM_TIM_SHIFT;
     s->capability |= ((uint64_t)(HPET_CLK_PERIOD * FS_PER_NS) << 32);