From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Date: Fri, 8 Mar 2019 10:47:35 +0000 (+0100)
Subject: 4.4-stable patches
X-Git-Tag: v5.0.1~18
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f3365dcf2cba0dfa16b6c83ee9a62d579b6bf1fc;p=thirdparty%2Fkernel%2Fstable-queue.git

4.4-stable patches

added patches:
	x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch
---

diff --git a/queue-4.4/series b/queue-4.4/series
index cc6244b8719..7572082bcc4 100644
--- a/queue-4.4/series
+++ b/queue-4.4/series
@@ -70,6 +70,7 @@ xen-netback-fix-occasional-leak-of-grant-ref-mappings-under-memory-pressure.patc
 net-add-__icmp_send-helper.patch
 net-avoid-use-ipcb-in-cipso_v4_error.patch
 net-phy-micrel-ksz8061-link-failure-after-cable-connect.patch
+x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch
 netlabel-fix-out-of-bounds-memory-accesses.patch
 net-dsa-mv88e6xxx-fix-u64-statistics.patch
 ip6mr-do-not-call-__ip6_inc_stats-from-preemptible-context.patch
diff --git a/queue-4.4/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch b/queue-4.4/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch
new file mode 100644
index 00000000000..4a597508317
--- /dev/null
+++ b/queue-4.4/x86-cpu-amd-set-the-cpb-bit-unconditionally-on-f17h.patch
@@ -0,0 +1,47 @@
+From 0237199186e7a4aa5310741f0a6498a20c820fd7 Mon Sep 17 00:00:00 2001
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Date: Tue, 20 Nov 2018 11:00:18 +0800
+Subject: x86/CPU/AMD: Set the CPB bit unconditionally on F17h
+
+From: Jiaxun Yang <jiaxun.yang@flygoat.com>
+
+commit 0237199186e7a4aa5310741f0a6498a20c820fd7 upstream.
+
+Some F17h models do not have CPB set in CPUID even though the CPU
+supports it. Set the feature bit unconditionally on all F17h.
+
+ [ bp: Rewrite commit message and patch. ]
+
+Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
+Signed-off-by: Borislav Petkov <bp@suse.de>
+Acked-by: Tom Lendacky <thomas.lendacky@amd.com>
+Cc: "H. Peter Anvin" <hpa@zytor.com>
+Cc: Ingo Molnar <mingo@redhat.com>
+Cc: Sherry Hurwitz <sherry.hurwitz@amd.com>
+Cc: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
+Cc: Thomas Gleixner <tglx@linutronix.de>
+Cc: x86-ml <x86@kernel.org>
+Link: https://lkml.kernel.org/r/20181120030018.5185-1-jiaxun.yang@flygoat.com
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+
+---
+ arch/x86/kernel/cpu/amd.c |    8 +++-----
+ 1 file changed, 3 insertions(+), 5 deletions(-)
+
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -716,11 +716,9 @@ static void init_amd_bd(struct cpuinfo_x
+ static void init_amd_zn(struct cpuinfo_x86 *c)
+ {
+ 	set_cpu_cap(c, X86_FEATURE_ZEN);
+-	/*
+-	 * Fix erratum 1076: CPB feature bit not being set in CPUID. It affects
+-	 * all up to and including B1.
+-	 */
+-	if (c->x86_model <= 1 && c->x86_mask <= 1)
++
++	/* Fix erratum 1076: CPB feature bit not being set in CPUID. */
++	if (!cpu_has(c, X86_FEATURE_CPB))
+ 		set_cpu_cap(c, X86_FEATURE_CPB);
+ }
+