From: Richard Sandiford <rsandifo@nildram.co.uk>
Date: Sun, 21 Oct 2007 09:09:50 +0000 (+0000)
Subject: mips.h (ISA_HAS_LDC1_SDC1): New macro.
X-Git-Tag: releases/gcc-4.3.0~1902
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f457938f7f42894d3b0571b9d092f0706e192fae;p=thirdparty%2Fgcc.git

mips.h (ISA_HAS_LDC1_SDC1): New macro.

gcc/
	* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
	* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
	instead of checking mips_isa.

From-SVN: r129523
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3005f1133eae..cbc431f8e9b6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2007-10-21  Richard Sandiford  <rsandifo@nildram.co.uk>
+
+	* config/mips/mips.h (ISA_HAS_LDC1_SDC1): New macro.
+	* config/mips/mips.c (mips_split_64bit_move_p): Use ISA_HAS_LDC1_SDC1
+	instead of checking mips_isa.
+
 2007-10-21  Richard Sandiford  <rsandifo@nildram.co.uk>
 
 	* doc/invoke.texi (-mpaired-single): Don't say that the option
diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 419b6a498f42..0948832b8ab0 100644
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -3433,9 +3433,8 @@ mips_split_64bit_move_p (rtx dest, rtx src)
   if (FP_REG_RTX_P (src) && FP_REG_RTX_P (dest))
     return false;
 
-  /* Check for floating-point loads and stores.  They can be done using
-     ldc1 and sdc1 on MIPS II and above.  */
-  if (mips_isa > 1)
+  /* Check for floating-point loads and stores.  */
+  if (ISA_HAS_LDC1_SDC1)
     {
       if (FP_REG_RTX_P (dest) && MEM_P (src))
 	return false;
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 2b14f306d24c..96af71e62092 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -735,6 +735,9 @@ enum mips_code_readable_setting {
 				 && !TARGET_MIPS5500			\
 				 && !TARGET_MIPS16)
 
+/* ISA has LDC1 and SDC1.  */
+#define ISA_HAS_LDC1_SDC1	(!ISA_MIPS1 && !TARGET_MIPS16)
+
 /* ISA has the mips4 FP condition code instructions: FP-compare to CC,
    branch on CC, and move (both FP and non-FP) on CC.  */
 #define ISA_HAS_8CC		(ISA_MIPS4				\