From: Krzysztof Kozlowski <krzk@kernel.org>
Date: Thu, 10 Dec 2020 21:25:24 +0000 (+0100)
Subject: ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250
X-Git-Tag: v5.13-rc1~167^2~24^2~6
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f6368c60561370e4a92fac22982a3bd656172170;p=thirdparty%2Fkernel%2Flinux.git

ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250

The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 47580e8d94c2 ("ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-8-krzk@kernel.org
---

diff --git a/arch/arm/boot/dts/exynos5250-smdk5250.dts b/arch/arm/boot/dts/exynos5250-smdk5250.dts
index 8b5a79a8720c6..39bbe18145cf2 100644
--- a/arch/arm/boot/dts/exynos5250-smdk5250.dts
+++ b/arch/arm/boot/dts/exynos5250-smdk5250.dts
@@ -134,7 +134,7 @@
 		compatible = "maxim,max77686";
 		reg = <0x09>;
 		interrupt-parent = <&gpx3>;
-		interrupts = <2 IRQ_TYPE_NONE>;
+		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&max77686_irq>;
 		#clock-cells = <1>;