From: Sinan Kaya Date: Sun, 25 Mar 2018 14:39:16 +0000 (-0400) Subject: qlcnic: Eliminate duplicate barriers on weakly-ordered archs X-Git-Tag: v4.17-rc1~148^2~90^2~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=f9442ac498a86b1b0ec383a332be2635fbb1ed98;p=thirdparty%2Fkernel%2Flinux.git qlcnic: Eliminate duplicate barriers on weakly-ordered archs Code includes wmb() followed by writel(). writel() already has a barrier on some architectures like arm64. This ends up CPU observing two barriers back to back before executing the register write. Since code already has an explicit barrier call, changing writel() to writel_relaxed(). Signed-off-by: Sinan Kaya Acked-by: Manish Chopra Signed-off-by: David S. Miller --- diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c index 46b0372dd0326..97c146e7698a6 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic_83xx_hw.c @@ -478,7 +478,7 @@ irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *adapter) wmb(); /* clear the interrupt trigger control register */ - writel(0, adapter->isr_int_vec); + writel_relaxed(0, adapter->isr_int_vec); intr_val = readl(adapter->isr_int_vec); do { intr_val = readl(adapter->tgt_status_reg);