From: Andrzej Hajda Date: Tue, 17 Mar 2015 17:14:07 +0000 (+0900) Subject: ARM: dts: add async-bridge clocks to gsc power domain for exynos5420 X-Git-Tag: v4.1-rc1~50^2~3^2~2 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fa87bd4360ab4244467571f4235ccb2b362fea24;p=thirdparty%2Fkernel%2Flinux.git ARM: dts: add async-bridge clocks to gsc power domain for exynos5420 Both GSCALER IPs in gsc power domain have async-bridges (to FIMD and MIXER), therefore their clocks should be enabled during power domain switch. Signed-off-by: Andrzej Hajda Reviewed-by: Javier Martinez Canillas Tested-by: Javier Martinez Canillas Signed-off-by: Kukjin Kim --- diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index ac0fc09cdb40a..d4d643eac6b79 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -251,6 +251,8 @@ compatible = "samsung,exynos4210-pd"; reg = <0x10044000 0x20>; #power-domain-cells = <0>; + clocks = <&clock CLK_GSCL0>, <&clock CLK_GSCL1>; + clock-names = "asb0", "asb1"; }; isp_pd: power-domain@10044020 {