From: Greg Kroah-Hartman Date: Fri, 3 Oct 2014 21:24:30 +0000 (-0700) Subject: 3.14-stable patches X-Git-Tag: v3.16.4~5 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fb21cd08e3cf2c4988ee6b8fe656b40d0e92234c;p=thirdparty%2Fkernel%2Fstable-queue.git 3.14-stable patches added patches: aio-block-exit_aio-until-all-context-requests-are-completed.patch clk-prevent-erronous-parsing-of-children-during-rate-change.patch clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch staging-lustre-disable-virtual-block-device-for-64k-pages.patch --- diff --git a/queue-3.14/aio-block-exit_aio-until-all-context-requests-are-completed.patch b/queue-3.14/aio-block-exit_aio-until-all-context-requests-are-completed.patch new file mode 100644 index 00000000000..950250c2472 --- /dev/null +++ b/queue-3.14/aio-block-exit_aio-until-all-context-requests-are-completed.patch @@ -0,0 +1,46 @@ +From 6098b45b32e6baeacc04790773ced9340601d511 Mon Sep 17 00:00:00 2001 +From: Gu Zheng +Date: Wed, 3 Sep 2014 17:45:44 +0800 +Subject: aio: block exit_aio() until all context requests are completed + +From: Gu Zheng + +commit 6098b45b32e6baeacc04790773ced9340601d511 upstream. + +It seems that exit_aio() also needs to wait for all iocbs to complete (like +io_destroy), but we missed the wait step in current implemention, so fix +it in the same way as we did in io_destroy. + +Signed-off-by: Gu Zheng +Signed-off-by: Benjamin LaHaise +[bwh: Backported to 3.16: adjust context] +Signed-off-by: Ben Hutchings + +--- + fs/aio.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/fs/aio.c ++++ b/fs/aio.c +@@ -797,6 +797,9 @@ void exit_aio(struct mm_struct *mm) + unsigned i = 0; + + while (1) { ++ struct completion requests_done = ++ COMPLETION_INITIALIZER_ONSTACK(requests_done); ++ + rcu_read_lock(); + table = rcu_dereference(mm->ioctx_table); + +@@ -824,7 +827,10 @@ void exit_aio(struct mm_struct *mm) + */ + ctx->mmap_size = 0; + +- kill_ioctx(mm, ctx, NULL); ++ kill_ioctx(mm, ctx, &requests_done); ++ ++ /* Wait until all IO for the context are done. */ ++ wait_for_completion(&requests_done); + } + } + diff --git a/queue-3.14/clk-prevent-erronous-parsing-of-children-during-rate-change.patch b/queue-3.14/clk-prevent-erronous-parsing-of-children-during-rate-change.patch new file mode 100644 index 00000000000..3c6bcb56f10 --- /dev/null +++ b/queue-3.14/clk-prevent-erronous-parsing-of-children-during-rate-change.patch @@ -0,0 +1,53 @@ +From 067bb1741c27c8d3b74ac98c0b8fc12b31e67005 Mon Sep 17 00:00:00 2001 +From: Tero Kristo +Date: Thu, 21 Aug 2014 16:47:45 +0300 +Subject: clk: prevent erronous parsing of children during rate change + +From: Tero Kristo + +commit 067bb1741c27c8d3b74ac98c0b8fc12b31e67005 upstream. + +In some cases, clocks can switch their parent with clk_set_rate, for +example clk_mux can do this in some cases. Current implementation of +clk_change_rate uses un-safe list iteration on the clock children, which +will cause wrong clocks to be parsed in case any of the clock children +change their parents during the change rate operation. Fixed by using +the safe list iterator instead. + +The problem was detected due to some divide by zero errors generated +by clock init on dra7-evm board, see discussion under +http://article.gmane.org/gmane.linux.ports.arm.kernel/349180 for details. + +Fixes: 71472c0c06cf ("clk: add support for clock reparent on set_rate") +Signed-off-by: Tero Kristo +Reported-by: Nishanth Menon +Signed-off-by: Mike Turquette +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/clk.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/clk/clk.c ++++ b/drivers/clk/clk.c +@@ -1487,6 +1487,7 @@ static struct clk *clk_propagate_rate_ch + static void clk_change_rate(struct clk *clk) + { + struct clk *child; ++ struct hlist_node *tmp; + unsigned long old_rate; + unsigned long best_parent_rate = 0; + bool skip_set_rate = false; +@@ -1525,7 +1526,11 @@ static void clk_change_rate(struct clk * + if (clk->notifier_count && old_rate != clk->rate) + __clk_notify(clk, POST_RATE_CHANGE, old_rate, clk->rate); + +- hlist_for_each_entry(child, &clk->children, child_node) { ++ /* ++ * Use safe iteration, as change_rate can actually swap parents ++ * for certain clock types. ++ */ ++ hlist_for_each_entry_safe(child, tmp, &clk->children, child_node) { + /* Skip children who will be reparented to another clock */ + if (child->new_parent && child->new_parent != clk) + continue; diff --git a/queue-3.14/clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch b/queue-3.14/clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch new file mode 100644 index 00000000000..bf5f59719c1 --- /dev/null +++ b/queue-3.14/clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch @@ -0,0 +1,164 @@ +From ff20783f7b9f35b29e768d8ecc7076c1ca1a60ca Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Tue, 8 Jul 2014 18:36:06 -0700 +Subject: clk: qcom: Fix MN frequency tables, parent map, and jpegd + +From: Stephen Boyd + +commit ff20783f7b9f35b29e768d8ecc7076c1ca1a60ca upstream. + +Clocks that don't have a pre-divider don't list any pre-divider +in their frequency tables, but their tables are initialized using +aggregate initializers. Use tagged initializers so we properly +assign the m and n values for each frequency. Furthermore, the +mmcc_pxo_pll8_pll2_pll3 array improperly mapped the second +element to pll2 instead of pll8, causing the clock driver to +recalculate the wrong rate for any clocks using this array along +with a rate that uses pll2. Plus the .num_parents field is 3 +instead of 4 so you can't even switch the parent to pll3. Finally +I noticed that the jpegd clock improperly indicates that the +pre-divider width is only 2, when it's actually 4 bits wide. + +Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)" +Tested-by: Rob Clark +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/mmcc-msm8960.c | 82 ++++++++++++++++++++-------------------- + 1 file changed, 42 insertions(+), 40 deletions(-) + +--- a/drivers/clk/qcom/mmcc-msm8960.c ++++ b/drivers/clk/qcom/mmcc-msm8960.c +@@ -37,6 +37,8 @@ + #define P_PLL2 2 + #define P_PLL3 3 + ++#define F_MN(f, s, _m, _n) { .freq = f, .src = s, .m = _m, .n = _n } ++ + static u8 mmcc_pxo_pll8_pll2_map[] = { + [P_PXO] = 0, + [P_PLL8] = 2, +@@ -58,8 +60,8 @@ static u8 mmcc_pxo_pll8_pll2_pll3_map[] + + static const char *mmcc_pxo_pll8_pll2_pll3[] = { + "pxo", +- "pll2", + "pll8_vote", ++ "pll2", + "pll3", + }; + +@@ -709,18 +711,18 @@ static struct clk_branch csiphy2_timer_c + }; + + static struct freq_tbl clk_tbl_gfx2d[] = { +- { 27000000, P_PXO, 1, 0 }, +- { 48000000, P_PLL8, 1, 8 }, +- { 54857000, P_PLL8, 1, 7 }, +- { 64000000, P_PLL8, 1, 6 }, +- { 76800000, P_PLL8, 1, 5 }, +- { 96000000, P_PLL8, 1, 4 }, +- { 128000000, P_PLL8, 1, 3 }, +- { 145455000, P_PLL2, 2, 11 }, +- { 160000000, P_PLL2, 1, 5 }, +- { 177778000, P_PLL2, 2, 9 }, +- { 200000000, P_PLL2, 1, 4 }, +- { 228571000, P_PLL2, 2, 7 }, ++ F_MN( 27000000, P_PXO, 1, 0), ++ F_MN( 48000000, P_PLL8, 1, 8), ++ F_MN( 54857000, P_PLL8, 1, 7), ++ F_MN( 64000000, P_PLL8, 1, 6), ++ F_MN( 76800000, P_PLL8, 1, 5), ++ F_MN( 96000000, P_PLL8, 1, 4), ++ F_MN(128000000, P_PLL8, 1, 3), ++ F_MN(145455000, P_PLL2, 2, 11), ++ F_MN(160000000, P_PLL2, 1, 5), ++ F_MN(177778000, P_PLL2, 2, 9), ++ F_MN(200000000, P_PLL2, 1, 4), ++ F_MN(228571000, P_PLL2, 2, 7), + { } + }; + +@@ -841,22 +843,22 @@ static struct clk_branch gfx2d1_clk = { + }; + + static struct freq_tbl clk_tbl_gfx3d[] = { +- { 27000000, P_PXO, 1, 0 }, +- { 48000000, P_PLL8, 1, 8 }, +- { 54857000, P_PLL8, 1, 7 }, +- { 64000000, P_PLL8, 1, 6 }, +- { 76800000, P_PLL8, 1, 5 }, +- { 96000000, P_PLL8, 1, 4 }, +- { 128000000, P_PLL8, 1, 3 }, +- { 145455000, P_PLL2, 2, 11 }, +- { 160000000, P_PLL2, 1, 5 }, +- { 177778000, P_PLL2, 2, 9 }, +- { 200000000, P_PLL2, 1, 4 }, +- { 228571000, P_PLL2, 2, 7 }, +- { 266667000, P_PLL2, 1, 3 }, +- { 300000000, P_PLL3, 1, 4 }, +- { 320000000, P_PLL2, 2, 5 }, +- { 400000000, P_PLL2, 1, 2 }, ++ F_MN( 27000000, P_PXO, 1, 0), ++ F_MN( 48000000, P_PLL8, 1, 8), ++ F_MN( 54857000, P_PLL8, 1, 7), ++ F_MN( 64000000, P_PLL8, 1, 6), ++ F_MN( 76800000, P_PLL8, 1, 5), ++ F_MN( 96000000, P_PLL8, 1, 4), ++ F_MN(128000000, P_PLL8, 1, 3), ++ F_MN(145455000, P_PLL2, 2, 11), ++ F_MN(160000000, P_PLL2, 1, 5), ++ F_MN(177778000, P_PLL2, 2, 9), ++ F_MN(200000000, P_PLL2, 1, 4), ++ F_MN(228571000, P_PLL2, 2, 7), ++ F_MN(266667000, P_PLL2, 1, 3), ++ F_MN(300000000, P_PLL3, 1, 4), ++ F_MN(320000000, P_PLL2, 2, 5), ++ F_MN(400000000, P_PLL2, 1, 2), + { } + }; + +@@ -896,7 +898,7 @@ static struct clk_dyn_rcg gfx3d_src = { + .hw.init = &(struct clk_init_data){ + .name = "gfx3d_src", + .parent_names = mmcc_pxo_pll8_pll2_pll3, +- .num_parents = 3, ++ .num_parents = 4, + .ops = &clk_dyn_rcg_ops, + }, + }, +@@ -994,7 +996,7 @@ static struct clk_rcg jpegd_src = { + .ns_reg = 0x00ac, + .p = { + .pre_div_shift = 12, +- .pre_div_width = 2, ++ .pre_div_width = 4, + }, + .s = { + .src_sel_shift = 0, +@@ -1341,15 +1343,15 @@ static struct clk_branch hdmi_app_clk = + }; + + static struct freq_tbl clk_tbl_vcodec[] = { +- { 27000000, P_PXO, 1, 0 }, +- { 32000000, P_PLL8, 1, 12 }, +- { 48000000, P_PLL8, 1, 8 }, +- { 54860000, P_PLL8, 1, 7 }, +- { 96000000, P_PLL8, 1, 4 }, +- { 133330000, P_PLL2, 1, 6 }, +- { 200000000, P_PLL2, 1, 4 }, +- { 228570000, P_PLL2, 2, 7 }, +- { 266670000, P_PLL2, 1, 3 }, ++ F_MN( 27000000, P_PXO, 1, 0), ++ F_MN( 32000000, P_PLL8, 1, 12), ++ F_MN( 48000000, P_PLL8, 1, 8), ++ F_MN( 54860000, P_PLL8, 1, 7), ++ F_MN( 96000000, P_PLL8, 1, 4), ++ F_MN(133330000, P_PLL2, 1, 6), ++ F_MN(200000000, P_PLL2, 1, 4), ++ F_MN(228570000, P_PLL2, 2, 7), ++ F_MN(266670000, P_PLL2, 1, 3), + { } + }; + diff --git a/queue-3.14/clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch b/queue-3.14/clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch new file mode 100644 index 00000000000..366f501375b --- /dev/null +++ b/queue-3.14/clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch @@ -0,0 +1,31 @@ +From f87dfcabc6f173cc811d185d33327f50a8c88399 Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Tue, 8 Jul 2014 18:36:06 -0700 +Subject: clk: qcom: mdp_lut_clk is a child of mdp_src + +From: Stephen Boyd + +commit f87dfcabc6f173cc811d185d33327f50a8c88399 upstream. + +The mdp_lut_clk isn't a child of the mdp_clk. Instead it's the +child of the mdp_src clock. Fix it. + +Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)" +Signed-off-by: Stephen Boyd +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/clk/qcom/mmcc-msm8960.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/clk/qcom/mmcc-msm8960.c ++++ b/drivers/clk/qcom/mmcc-msm8960.c +@@ -1116,7 +1116,7 @@ static struct clk_branch mdp_lut_clk = { + .enable_reg = 0x016c, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ +- .parent_names = (const char *[]){ "mdp_clk" }, ++ .parent_names = (const char *[]){ "mdp_src" }, + .num_parents = 1, + .name = "mdp_lut_clk", + .ops = &clk_branch_ops, diff --git a/queue-3.14/series b/queue-3.14/series index 4f22ff2e94d..142ab956ef5 100644 --- a/queue-3.14/series +++ b/queue-3.14/series @@ -231,3 +231,8 @@ dmaengine-dw-introduce-dwc_dostart_first_queued-helper.patch dmaengine-dw-don-t-perform-dma-when-dmaengine_submit-is-called.patch partitions-aix.c-off-by-one-bug.patch perf-x86-intel-use-rdmsrl_safe-when-initializing-rapl-pmu.patch +clk-prevent-erronous-parsing-of-children-during-rate-change.patch +aio-block-exit_aio-until-all-context-requests-are-completed.patch +staging-lustre-disable-virtual-block-device-for-64k-pages.patch +clk-qcom-fix-mn-frequency-tables-parent-map-and-jpegd.patch +clk-qcom-mdp_lut_clk-is-a-child-of-mdp_src.patch diff --git a/queue-3.14/staging-lustre-disable-virtual-block-device-for-64k-pages.patch b/queue-3.14/staging-lustre-disable-virtual-block-device-for-64k-pages.patch new file mode 100644 index 00000000000..907fde5561d --- /dev/null +++ b/queue-3.14/staging-lustre-disable-virtual-block-device-for-64k-pages.patch @@ -0,0 +1,29 @@ +From 0bf22be0da8ea74bc7ccc5b07d7855830be16eca Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Fri, 20 Jun 2014 14:23:28 +0200 +Subject: staging/lustre: disable virtual block device for 64K pages + +From: Arnd Bergmann + +commit 0bf22be0da8ea74bc7ccc5b07d7855830be16eca upstream. + +The lustre virtual block device cannot handle 64K pages and fails at compile +time. To avoid running into this error, let's disable the Kconfig option +for this driver in cases it doesn't support. + +Reported-by: Dann Frazier +Signed-off-by: Arnd Bergmann +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/staging/lustre/lustre/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/staging/lustre/lustre/Kconfig ++++ b/drivers/staging/lustre/lustre/Kconfig +@@ -57,4 +57,5 @@ config LUSTRE_TRANSLATE_ERRNOS + config LUSTRE_LLITE_LLOOP + tristate "Lustre virtual block device" + depends on LUSTRE_FS && BLOCK ++ depends on !PPC_64K_PAGES && !ARM64_64K_PAGES + default m