From: Yodel Eldar Date: Mon, 26 May 2025 15:12:18 +0000 (-0500) Subject: gdb/alpha: Add target description support X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fb2b625650ec78f7d46b357468d8fcef4990635e;p=thirdparty%2Fbinutils-gdb.git gdb/alpha: Add target description support This commit adds target description support for Alpha. The target description obviates the alpha_register_type and alpha_register_name functions in alpha-tdep.c. Removal of alpha_register_reggroup_p was considered but ultimately abandoned, because the "info regs" command would no longer omit the zero, fpcr, and unique registers from its output (they are neither vector nor float types). Register types in the target description annex match the types that the alpha_register_type function returned. The locally defined register_names array was moved out of alpha_register_name and renamed to alpha_register_names as a static global; calls to alpha_register_name have been replaced with direct access of the array. The patch follows the code pattern outlined in the following GDB Internals Wiki entry: https://sourceware.org/gdb/wiki/Internals%20Adding-Target-Described-Register-Support Reviewed-By: Eli Zaretskii Approved-By: Simon Marchi Change-Id: If4b25a891228388519074a31a682e33358c71063 --- diff --git a/gdb/NEWS b/gdb/NEWS index 2abe376a583..4c9aed421bb 100644 --- a/gdb/NEWS +++ b/gdb/NEWS @@ -236,6 +236,8 @@ vFile:stat debug information to be disabled at configure time. The flag to do that is --disable-gdb-mdebug-support. +* The Alpha target now supports target descriptions. + *** Changes in GDB 16 * Support for Nios II targets has been removed as this architecture diff --git a/gdb/alpha-tdep.c b/gdb/alpha-tdep.c index 92a6411162e..5e8a7a02c2f 100644 --- a/gdb/alpha-tdep.c +++ b/gdb/alpha-tdep.c @@ -43,6 +43,9 @@ #include "alpha-tdep.h" #include +#include "target-descriptions.h" +#include "features/alpha.c" + /* Instruction decoding. The notations for registers, immediates and opcodes are the same as the one used in Compaq's Alpha architecture handbook. */ @@ -75,60 +78,38 @@ static const int subq_opcode = 0x10; static const int subq_function = 0x29; -/* Return the name of the REGNO register. +/* Alpha registers using their software names. An empty name corresponds to a register number that used to be used for a virtual register. That virtual register has been removed, but the index is still reserved to maintain compatibility with existing remote alpha targets. */ -static const char * -alpha_register_name (struct gdbarch *gdbarch, int regno) +static const char * const alpha_register_names[] = { - static const char * const register_names[] = - { - "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", - "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", - "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", - "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", - "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", - "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", - "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", - "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", - "pc", "", "unique" - }; - - static_assert (ALPHA_NUM_REGS == ARRAY_SIZE (register_names)); - return register_names[regno]; -} + "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6", + "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp", + "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9", + "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero", + "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", + "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", + "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", + "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr", + "pc", "", "unique" +}; +static_assert (ALPHA_NUM_REGS == ARRAY_SIZE (alpha_register_names)); static int alpha_cannot_fetch_register (struct gdbarch *gdbarch, int regno) { - return (strlen (alpha_register_name (gdbarch, regno)) == 0); + return (strlen (alpha_register_names[regno]) == 0); } static int alpha_cannot_store_register (struct gdbarch *gdbarch, int regno) { return (regno == ALPHA_ZERO_REGNUM - || strlen (alpha_register_name (gdbarch, regno)) == 0); -} - -static struct type * -alpha_register_type (struct gdbarch *gdbarch, int regno) -{ - if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM) - return builtin_type (gdbarch)->builtin_data_ptr; - if (regno == ALPHA_PC_REGNUM) - return builtin_type (gdbarch)->builtin_func_ptr; - - /* Don't need to worry about little vs big endian until - some jerk tries to port to alpha-unicosmk. */ - if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31) - return builtin_type (gdbarch)->builtin_double; - - return builtin_type (gdbarch)->builtin_int64; + || strlen (alpha_register_names[regno]) == 0); } /* Is REGNUM a member of REGGROUP? */ @@ -1715,11 +1696,39 @@ alpha_software_single_step (struct regcache *regcache) static struct gdbarch * alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) { + tdesc_arch_data_up tdesc_data; + const struct target_desc *tdesc = info.target_desc; + /* Find a candidate among extant architectures. */ arches = gdbarch_list_lookup_by_info (arches, &info); if (arches != NULL) return arches->gdbarch; + if (tdesc == nullptr) + tdesc = tdesc_alpha; + + /* Validate target description. */ + if (tdesc_has_registers (tdesc)) + { + const struct tdesc_feature *feature; + bool valid_p; + + feature = tdesc_find_feature (tdesc, "org.gnu.gdb.alpha.core"); + if (feature == nullptr) + return nullptr; + + tdesc_data = tdesc_data_alloc (); + valid_p = true; + for (int i = 0; i < ALPHA_NUM_REGS; ++i) + valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i, + alpha_register_names[i]); + + if (!valid_p) + return nullptr; + } + + gdb_assert (tdesc_data != nullptr); + gdbarch *gdbarch = gdbarch_alloc (&info, gdbarch_tdep_up (new alpha_gdbarch_tdep)); alpha_gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); @@ -1756,8 +1765,7 @@ alpha_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) set_gdbarch_pc_regnum (gdbarch, ALPHA_PC_REGNUM); set_gdbarch_fp0_regnum (gdbarch, ALPHA_FP0_REGNUM); - set_gdbarch_register_name (gdbarch, alpha_register_name); - set_gdbarch_register_type (gdbarch, alpha_register_type); + tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data)); set_gdbarch_cannot_fetch_register (gdbarch, alpha_cannot_fetch_register); set_gdbarch_cannot_store_register (gdbarch, alpha_cannot_store_register); @@ -1820,6 +1828,7 @@ INIT_GDB_FILE (alpha_tdep) gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL); + initialize_tdesc_alpha (); /* Let the user set the fence post for heuristic_proc_start. */ /* We really would like to have both "0" and "unlimited" work, but diff --git a/gdb/doc/gdb.texinfo b/gdb/doc/gdb.texinfo index b6d626b4031..35b770f8138 100644 --- a/gdb/doc/gdb.texinfo +++ b/gdb/doc/gdb.texinfo @@ -49237,6 +49237,7 @@ registers using the capitalization used in the description. @menu * AArch64 Features:: +* Alpha Features:: * ARC Features:: * ARM Features:: * i386 Features:: @@ -49543,6 +49544,47 @@ of bytes. Extra registers are allowed in this feature, but they will not affect @value{GDBN}. +@node Alpha Features +@subsection Alpha Features +@cindex target descriptions, Alpha Features + +The @samp{org.gnu.gdb.alpha.core} feature is required for Alpha targets. It +must contain the following 64-bit registers; note that @value{GDBN} uses the +software names for Alpha registers: + +@itemize @minus +@item +@samp{v0}: function return value +@item +@samp{t0} through @samp{t12}: temporary registers +@item +@samp{s0} through @samp{s5}: saved registers +@item +@samp{fp}: frame pointer +@item +@samp{a0} through @samp{a5}: argument registers +@item +@samp{ra}: return address +@item +@samp{at}: assembler temporary register +@item +@samp{gp}: global pointer +@item +@samp{sp}: stack pointer +@item +@samp{zero}: always zero +@item +@samp{f0} through @samp{f30}: floating-point registers +@item +@samp{fpcr}: floating-point control register +@item +@samp{pc}: program counter +@item +@samp{}: an anonymous register for historical purpose +@item +@samp{unique}: PALcode memory slot +@end itemize + @node ARC Features @subsection ARC Features @cindex target descriptions, ARC Features diff --git a/gdb/features/Makefile b/gdb/features/Makefile index 7a8c7999733..750508a85e6 100644 --- a/gdb/features/Makefile +++ b/gdb/features/Makefile @@ -100,6 +100,7 @@ OUTPUTS = $(patsubst %,$(outdir)/%.dat,$(WHICH)) # --enable-targets=all GDB. You can override this by passing XMLTOC # to make on the command line. XMLTOC = \ + alpha.xml \ microblaze-with-stack-protect.xml \ microblaze.xml \ mips-dsp-linux.xml \ diff --git a/gdb/features/alpha-core.xml b/gdb/features/alpha-core.xml new file mode 100644 index 00000000000..9b4d71cf855 --- /dev/null +++ b/gdb/features/alpha-core.xml @@ -0,0 +1,88 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb/features/alpha.c b/gdb/features/alpha.c new file mode 100644 index 00000000000..051ded863f1 --- /dev/null +++ b/gdb/features/alpha.c @@ -0,0 +1,84 @@ +/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro: + Original: alpha.xml */ + +#include "osabi.h" +#include "target-descriptions.h" + +const struct target_desc *tdesc_alpha; +static void +initialize_tdesc_alpha (void) +{ + target_desc_up result = allocate_target_description (); + struct tdesc_feature *feature; + + feature = tdesc_create_feature (result.get (), "org.gnu.gdb.alpha.core"); + tdesc_create_reg (feature, "v0", 0, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t0", 1, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t1", 2, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t2", 3, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t3", 4, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t4", 5, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t5", 6, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t6", 7, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t7", 8, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s0", 9, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s1", 10, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s2", 11, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s3", 12, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s4", 13, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "s5", 14, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "fp", 15, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a0", 16, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a1", 17, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a2", 18, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a3", 19, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a4", 20, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "a5", 21, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t8", 22, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t9", 23, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t10", 24, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t11", 25, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "ra", 26, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "t12", 27, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "at", 28, 1, NULL, 64, "int64"); + tdesc_create_reg (feature, "gp", 29, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "sp", 30, 1, NULL, 64, "data_ptr"); + tdesc_create_reg (feature, "zero", 31, 0, NULL, 64, "int64"); + tdesc_create_reg (feature, "f0", 32, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f1", 33, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f2", 34, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f3", 35, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f4", 36, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f5", 37, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f6", 38, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f7", 39, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f8", 40, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f9", 41, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f10", 42, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f11", 43, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f12", 44, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f13", 45, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f14", 46, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f15", 47, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f16", 48, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f17", 49, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f18", 50, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f19", 51, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f20", 52, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f21", 53, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f22", 54, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f23", 55, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f24", 56, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f25", 57, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f26", 58, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f27", 59, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f28", 60, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f29", 61, 1, "float", 64, "float"); + tdesc_create_reg (feature, "f30", 62, 1, "float", 64, "float"); + tdesc_create_reg (feature, "fpcr", 63, 1, "float", 64, "int64"); + tdesc_create_reg (feature, "pc", 64, 1, NULL, 64, "code_ptr"); + tdesc_create_reg (feature, "", 65, 0, NULL, 64, "int64"); + tdesc_create_reg (feature, "unique", 66, 1, "system", 64, "int64"); + + tdesc_alpha = result.release (); +} diff --git a/gdb/features/alpha.xml b/gdb/features/alpha.xml new file mode 100644 index 00000000000..3ae0ab8b972 --- /dev/null +++ b/gdb/features/alpha.xml @@ -0,0 +1,11 @@ + + + + + + +