From: Greg Kroah-Hartman Date: Tue, 30 Apr 2024 08:20:54 +0000 (+0200) Subject: 6.8-stable patches X-Git-Tag: v4.19.313~13 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fb696074324278d031d9760acad749c23c5695ab;p=thirdparty%2Fkernel%2Fstable-queue.git 6.8-stable patches added patches: bounds-use-the-right-number-of-bits-for-power-of-two-config_nr_cpus.patch phy-qcom-qmp-combo-fix-vco-div-offset-on-v5_5nm-and-v6.patch --- diff --git a/queue-6.8/bounds-use-the-right-number-of-bits-for-power-of-two-config_nr_cpus.patch b/queue-6.8/bounds-use-the-right-number-of-bits-for-power-of-two-config_nr_cpus.patch new file mode 100644 index 00000000000..62b5b57775e --- /dev/null +++ b/queue-6.8/bounds-use-the-right-number-of-bits-for-power-of-two-config_nr_cpus.patch @@ -0,0 +1,44 @@ +From 5af385f5f4cddf908f663974847a4083b2ff2c79 Mon Sep 17 00:00:00 2001 +From: "Matthew Wilcox (Oracle)" +Date: Mon, 29 Apr 2024 15:47:51 +0100 +Subject: bounds: Use the right number of bits for power-of-two CONFIG_NR_CPUS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Matthew Wilcox (Oracle) + +commit 5af385f5f4cddf908f663974847a4083b2ff2c79 upstream. + +bits_per() rounds up to the next power of two when passed a power of +two. This causes crashes on some machines and configurations. + +Reported-by: Михаил Новоселов +Tested-by: Ильфат Гаптрахманов +Link: https://gitlab.freedesktop.org/drm/amd/-/issues/3347 +Link: https://lore.kernel.org/all/1c978cf1-2934-4e66-e4b3-e81b04cb3571@rosalinux.ru/ +Fixes: f2d5dcb48f7b (bounds: support non-power-of-two CONFIG_NR_CPUS) +Cc: +Signed-off-by: Matthew Wilcox (Oracle) +Cc: Rik van Riel +Cc: Mel Gorman +Cc: Peter Zijlstra +Cc: Ingo Molnar +Cc: Andrew Morton +Signed-off-by: Linus Torvalds +Signed-off-by: Greg Kroah-Hartman +--- + kernel/bounds.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/kernel/bounds.c ++++ b/kernel/bounds.c +@@ -19,7 +19,7 @@ int main(void) + DEFINE(NR_PAGEFLAGS, __NR_PAGEFLAGS); + DEFINE(MAX_NR_ZONES, __MAX_NR_ZONES); + #ifdef CONFIG_SMP +- DEFINE(NR_CPUS_BITS, bits_per(CONFIG_NR_CPUS)); ++ DEFINE(NR_CPUS_BITS, order_base_2(CONFIG_NR_CPUS)); + #endif + DEFINE(SPINLOCK_SIZE, sizeof(spinlock_t)); + #ifdef CONFIG_LRU_GEN diff --git a/queue-6.8/phy-qcom-qmp-combo-fix-vco-div-offset-on-v5_5nm-and-v6.patch b/queue-6.8/phy-qcom-qmp-combo-fix-vco-div-offset-on-v5_5nm-and-v6.patch new file mode 100644 index 00000000000..98ec062607e --- /dev/null +++ b/queue-6.8/phy-qcom-qmp-combo-fix-vco-div-offset-on-v5_5nm-and-v6.patch @@ -0,0 +1,68 @@ +From 025a6f7448f7bb5f4fceb62498ee33d89ae266bb Mon Sep 17 00:00:00 2001 +From: Johan Hovold +Date: Mon, 8 Apr 2024 11:30:23 +0200 +Subject: phy: qcom: qmp-combo: fix VCO div offset on v5_5nm and v6 + +From: Johan Hovold + +commit 025a6f7448f7bb5f4fceb62498ee33d89ae266bb upstream. + +Commit 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") +fixed a regression introduced in 6.5 by making sure that the correct +offset is used for the DP_PHY_VCO_DIV register on v3 hardware. + +Unfortunately, that fix instead broke DisplayPort on v5_5nm and v6 +hardware as it failed to add the corresponding offsets also to those +register tables. + +Fixes: 815891eee668 ("phy: qcom-qmp-combo: Introduce orientation variable") +Fixes: 5abed58a8bde ("phy: qcom: qmp-combo: Fix VCO div offset on v3") +Cc: stable@vger.kernel.org # 6.5: 5abed58a8bde +Cc: Stephen Boyd +Cc: Abhinav Kumar +Cc: Dmitry Baryshkov +Signed-off-by: Johan Hovold +Reviewed-by: Dmitry Baryshkov +Reviewed-by: Stephen Boyd +Reviewed-by: Abhinav Kumar +Link: https://lore.kernel.org/r/20240408093023.506-1-johan+linaro@kernel.org +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +Signed-off-by: Stephen Boyd +--- + drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 2 ++ + drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ + 2 files changed, 4 insertions(+) + +--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c ++++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c +@@ -188,6 +188,7 @@ static const unsigned int qmp_v5_5nm_usb + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V5_COM_BIAS_EN_CLKBUFLR_EN, + + [QPHY_DP_PHY_STATUS] = QSERDES_V5_DP_PHY_STATUS, ++ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V5_DP_PHY_VCO_DIV, + + [QPHY_TX_TX_POL_INV] = QSERDES_V5_5NM_TX_TX_POL_INV, + [QPHY_TX_TX_DRV_LVL] = QSERDES_V5_5NM_TX_TX_DRV_LVL, +@@ -212,6 +213,7 @@ static const unsigned int qmp_v6_usb3phy + [QPHY_COM_BIAS_EN_CLKBUFLR_EN] = QSERDES_V6_COM_PLL_BIAS_EN_CLK_BUFLR_EN, + + [QPHY_DP_PHY_STATUS] = QSERDES_V6_DP_PHY_STATUS, ++ [QPHY_DP_PHY_VCO_DIV] = QSERDES_V6_DP_PHY_VCO_DIV, + + [QPHY_TX_TX_POL_INV] = QSERDES_V6_TX_TX_POL_INV, + [QPHY_TX_TX_DRV_LVL] = QSERDES_V6_TX_TX_DRV_LVL, +--- a/drivers/phy/qualcomm/phy-qcom-qmp.h ++++ b/drivers/phy/qualcomm/phy-qcom-qmp.h +@@ -132,9 +132,11 @@ + #define QSERDES_V4_DP_PHY_AUX_INTERRUPT_STATUS 0x0d8 + #define QSERDES_V4_DP_PHY_STATUS 0x0dc + ++#define QSERDES_V5_DP_PHY_VCO_DIV 0x070 + #define QSERDES_V5_DP_PHY_STATUS 0x0dc + + /* Only for QMP V6 PHY - DP PHY registers */ ++#define QSERDES_V6_DP_PHY_VCO_DIV 0x070 + #define QSERDES_V6_DP_PHY_AUX_INTERRUPT_STATUS 0x0e0 + #define QSERDES_V6_DP_PHY_STATUS 0x0e4 + diff --git a/queue-6.8/series b/queue-6.8/series index e5aec6b81ab..961d585623e 100644 --- a/queue-6.8/series +++ b/queue-6.8/series @@ -221,3 +221,5 @@ sched-eevdf-prevent-vlag-from-going-out-of-bounds-in.patch riscv-hwprobe-fix-invalid-sign-extension-for-riscv_h.patch risc-v-selftests-cbo-ensure-asm-operands-match-const.patch i2c-smbus-fix-null-function-pointer-dereference.patch +phy-qcom-qmp-combo-fix-vco-div-offset-on-v5_5nm-and-v6.patch +bounds-use-the-right-number-of-bits-for-power-of-two-config_nr_cpus.patch