From: Greg Kroah-Hartman Date: Thu, 25 Aug 2022 12:02:09 +0000 (+0200) Subject: 5.10-stable patches X-Git-Tag: v5.10.140~47 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fcff82722e00df3829e81f63d386e3bb55e27582;p=thirdparty%2Fkernel%2Fstable-queue.git 5.10-stable patches added patches: pinctrl-amd-don-t-save-restore-interrupt-status-and-wake-status-bits.patch --- diff --git a/queue-5.10/pinctrl-amd-don-t-save-restore-interrupt-status-and-wake-status-bits.patch b/queue-5.10/pinctrl-amd-don-t-save-restore-interrupt-status-and-wake-status-bits.patch new file mode 100644 index 00000000000..58fbedc5938 --- /dev/null +++ b/queue-5.10/pinctrl-amd-don-t-save-restore-interrupt-status-and-wake-status-bits.patch @@ -0,0 +1,64 @@ +From b8c824a869f220c6b46df724f85794349bafbf23 Mon Sep 17 00:00:00 2001 +From: Basavaraj Natikar +Date: Mon, 13 Jun 2022 12:11:26 +0530 +Subject: pinctrl: amd: Don't save/restore interrupt status and wake status bits + +From: Basavaraj Natikar + +commit b8c824a869f220c6b46df724f85794349bafbf23 upstream. + +Saving/restoring interrupt and wake status bits across suspend can +cause the suspend to fail if an IRQ is serviced across the +suspend cycle. + +Signed-off-by: Mario Limonciello +Signed-off-by: Basavaraj Natikar +Fixes: 79d2c8bede2c ("pinctrl/amd: save pin registers over suspend/resume") +Link: https://lore.kernel.org/r/20220613064127.220416-3-Basavaraj.Natikar@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 11 +++++++++-- + 1 file changed, 9 insertions(+), 2 deletions(-) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -815,6 +815,7 @@ static int amd_gpio_suspend(struct devic + { + struct amd_gpio *gpio_dev = dev_get_drvdata(dev); + struct pinctrl_desc *desc = gpio_dev->pctrl->desc; ++ unsigned long flags; + int i; + + for (i = 0; i < desc->npins; i++) { +@@ -823,7 +824,9 @@ static int amd_gpio_suspend(struct devic + if (!amd_gpio_should_save(gpio_dev, pin)) + continue; + +- gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin*4); ++ raw_spin_lock_irqsave(&gpio_dev->lock, flags); ++ gpio_dev->saved_regs[i] = readl(gpio_dev->base + pin * 4) & ~PIN_IRQ_PENDING; ++ raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + } + + return 0; +@@ -833,6 +836,7 @@ static int amd_gpio_resume(struct device + { + struct amd_gpio *gpio_dev = dev_get_drvdata(dev); + struct pinctrl_desc *desc = gpio_dev->pctrl->desc; ++ unsigned long flags; + int i; + + for (i = 0; i < desc->npins; i++) { +@@ -841,7 +845,10 @@ static int amd_gpio_resume(struct device + if (!amd_gpio_should_save(gpio_dev, pin)) + continue; + +- writel(gpio_dev->saved_regs[i], gpio_dev->base + pin*4); ++ raw_spin_lock_irqsave(&gpio_dev->lock, flags); ++ gpio_dev->saved_regs[i] |= readl(gpio_dev->base + pin * 4) & PIN_IRQ_PENDING; ++ writel(gpio_dev->saved_regs[i], gpio_dev->base + pin * 4); ++ raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + } + + return 0; diff --git a/queue-5.10/series b/queue-5.10/series index d89cfe96b71..6446938975d 100644 --- a/queue-5.10/series +++ b/queue-5.10/series @@ -1,3 +1,4 @@ audit-fix-potential-double-free-on-error-path-from-fsnotify_add_inode_mark.patch parisc-fix-exception-handler-for-fldw-and-fstw-instructions.patch kernel-sys_ni-add-compat-entry-for-fadvise64_64.patch +pinctrl-amd-don-t-save-restore-interrupt-status-and-wake-status-bits.patch