From: H.J. Lu <hongjiu.lu@intel.com>
Date: Mon, 18 Feb 2008 23:44:32 +0000 (+0000)
Subject: i386-modes.def: Use 4 byte alignment on DI for 32bit host.
X-Git-Tag: releases/gcc-4.4.0~6435
X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=feaffcaaa9c1b005498a51fc4b2af6d3c9d21fe1;p=thirdparty%2Fgcc.git

i386-modes.def: Use 4 byte alignment on DI for 32bit host.

2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386-modes.def: Use 4 byte alignment on DI for
	32bit host.

From-SVN: r132397
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 3ecc40c81329..733d076d7e86 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2008-02-18  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/i386-modes.def: Use 4 byte alignment on DI for
+	32bit host.
+
 2008-02-18  Joey Ye  <joey.ye@intel.com>
 
 	PR middle-end/34921
diff --git a/gcc/config/i386/i386-modes.def b/gcc/config/i386/i386-modes.def
index 105d3872b79e..f2f2b4f2acb3 100644
--- a/gcc/config/i386/i386-modes.def
+++ b/gcc/config/i386/i386-modes.def
@@ -17,6 +17,10 @@ You should have received a copy of the GNU General Public License
 along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
+/* In 32bit, DI mode uses 32bit registers.  Only 4 byte alignment
+   is needed.  */
+ADJUST_ALIGNMENT (DI, (TARGET_64BIT || TARGET_ALIGN_DOUBLE) ? 8 : 4);
+
 /* The x86_64 ABI specifies both XF and TF modes.
    XFmode is __float80 is IEEE extended; TFmode is __float128
    is IEEE quad.  */