From: Greg Kroah-Hartman Date: Mon, 15 Nov 2021 15:40:16 +0000 (+0100) Subject: 5.14-stable patches X-Git-Tag: v5.4.160~27 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ff00242484490a77bc148cece8f9ba6de201fe3f;p=thirdparty%2Fkernel%2Fstable-queue.git 5.14-stable patches added patches: pci-aardvark-fix-pcie-max-payload-size-setting.patch pci-add-pci_exp_devctl_payload_-macros.patch pinctrl-amd-add-irq-field-data.patch pinctrl-amd-handle-wake-up-interrupt.patch sunrpc-partial-revert-of-commit-6f9f17287e78.patch --- diff --git a/queue-5.14/pci-aardvark-fix-pcie-max-payload-size-setting.patch b/queue-5.14/pci-aardvark-fix-pcie-max-payload-size-setting.patch new file mode 100644 index 00000000000..c8c47489699 --- /dev/null +++ b/queue-5.14/pci-aardvark-fix-pcie-max-payload-size-setting.patch @@ -0,0 +1,50 @@ +From a4e17d65dafdd3513042d8f00404c9b6068a825c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 5 Oct 2021 20:09:41 +0200 +Subject: PCI: aardvark: Fix PCIe Max Payload Size setting +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Pali Rohár + +commit a4e17d65dafdd3513042d8f00404c9b6068a825c upstream. + +Change PCIe Max Payload Size setting in PCIe Device Control register to 512 +bytes to align with PCIe Link Initialization sequence as defined in Marvell +Armada 3700 Functional Specification. According to the specification, +maximal Max Payload Size supported by this device is 512 bytes. + +Without this kernel prints suspicious line: + + pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 256 (was 16384, max 512) + +With this change it changes to: + + pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 256 (was 512, max 512) + +Link: https://lore.kernel.org/r/20211005180952.6812-3-kabel@kernel.org +Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Marek Behún +Cc: stable@vger.kernel.org +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pci/controller/pci-aardvark.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -597,8 +597,9 @@ static void advk_pcie_setup_hw(struct ad + reg = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL); + reg &= ~PCI_EXP_DEVCTL_RELAX_EN; + reg &= ~PCI_EXP_DEVCTL_NOSNOOP_EN; ++ reg &= ~PCI_EXP_DEVCTL_PAYLOAD; + reg &= ~PCI_EXP_DEVCTL_READRQ; +- reg |= PCI_EXP_DEVCTL_PAYLOAD; /* Set max payload size */ ++ reg |= PCI_EXP_DEVCTL_PAYLOAD_512B; + reg |= PCI_EXP_DEVCTL_READRQ_512B; + advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL); + diff --git a/queue-5.14/pci-add-pci_exp_devctl_payload_-macros.patch b/queue-5.14/pci-add-pci_exp_devctl_payload_-macros.patch new file mode 100644 index 00000000000..7a78198617a --- /dev/null +++ b/queue-5.14/pci-add-pci_exp_devctl_payload_-macros.patch @@ -0,0 +1,41 @@ +From 460275f124fb072dca218a6b43b6370eebbab20d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 5 Oct 2021 20:09:40 +0200 +Subject: PCI: Add PCI_EXP_DEVCTL_PAYLOAD_* macros +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Pali Rohár + +commit 460275f124fb072dca218a6b43b6370eebbab20d upstream. + +Define a macro PCI_EXP_DEVCTL_PAYLOAD_* for every possible Max Payload +Size in linux/pci_regs.h, in the same style as PCI_EXP_DEVCTL_READRQ_*. + +Link: https://lore.kernel.org/r/20211005180952.6812-2-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +Reviewed-by: Marek Behún +Reviewed-by: Bjorn Helgaas +Signed-off-by: Greg Kroah-Hartman +--- + include/uapi/linux/pci_regs.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/include/uapi/linux/pci_regs.h ++++ b/include/uapi/linux/pci_regs.h +@@ -504,6 +504,12 @@ + #define PCI_EXP_DEVCTL_URRE 0x0008 /* Unsupported Request Reporting En. */ + #define PCI_EXP_DEVCTL_RELAX_EN 0x0010 /* Enable relaxed ordering */ + #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 /* Max_Payload_Size */ ++#define PCI_EXP_DEVCTL_PAYLOAD_128B 0x0000 /* 128 Bytes */ ++#define PCI_EXP_DEVCTL_PAYLOAD_256B 0x0020 /* 256 Bytes */ ++#define PCI_EXP_DEVCTL_PAYLOAD_512B 0x0040 /* 512 Bytes */ ++#define PCI_EXP_DEVCTL_PAYLOAD_1024B 0x0060 /* 1024 Bytes */ ++#define PCI_EXP_DEVCTL_PAYLOAD_2048B 0x0080 /* 2048 Bytes */ ++#define PCI_EXP_DEVCTL_PAYLOAD_4096B 0x00a0 /* 4096 Bytes */ + #define PCI_EXP_DEVCTL_EXT_TAG 0x0100 /* Extended Tag Field Enable */ + #define PCI_EXP_DEVCTL_PHANTOM 0x0200 /* Phantom Functions Enable */ + #define PCI_EXP_DEVCTL_AUX_PME 0x0400 /* Auxiliary Power PM Enable */ diff --git a/queue-5.14/pinctrl-amd-add-irq-field-data.patch b/queue-5.14/pinctrl-amd-add-irq-field-data.patch new file mode 100644 index 00000000000..f04f1f55d40 --- /dev/null +++ b/queue-5.14/pinctrl-amd-add-irq-field-data.patch @@ -0,0 +1,67 @@ +From 7e6f8d6f4a42ef9b693ff1b49267c546931d4619 Mon Sep 17 00:00:00 2001 +From: Basavaraj Natikar +Date: Tue, 31 Aug 2021 17:36:12 +0530 +Subject: pinctrl: amd: Add irq field data + +From: Basavaraj Natikar + +commit 7e6f8d6f4a42ef9b693ff1b49267c546931d4619 upstream. + +pinctrl_amd use gpiochip_get_data() to get their local state containers +back from the gpiochip passed as amd_gpio chip data. + +Hence added irq field data to get directly using amd_gpio chip data. + +Signed-off-by: Basavaraj Natikar +Tested-by: Mario Limonciello +Acked-by: Shyam Sundar S K +Link: https://lore.kernel.org/r/20210831120613.1514899-2-Basavaraj.Natikar@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 9 ++++----- + drivers/pinctrl/pinctrl-amd.h | 1 + + 2 files changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -932,7 +932,6 @@ static struct pinctrl_desc amd_pinctrl_d + static int amd_gpio_probe(struct platform_device *pdev) + { + int ret = 0; +- int irq_base; + struct resource *res; + struct amd_gpio *gpio_dev; + struct gpio_irq_chip *girq; +@@ -955,9 +954,9 @@ static int amd_gpio_probe(struct platfor + if (!gpio_dev->base) + return -ENOMEM; + +- irq_base = platform_get_irq(pdev, 0); +- if (irq_base < 0) +- return irq_base; ++ gpio_dev->irq = platform_get_irq(pdev, 0); ++ if (gpio_dev->irq < 0) ++ return gpio_dev->irq; + + #ifdef CONFIG_PM_SLEEP + gpio_dev->saved_regs = devm_kcalloc(&pdev->dev, amd_pinctrl_desc.npins, +@@ -1020,7 +1019,7 @@ static int amd_gpio_probe(struct platfor + goto out2; + } + +- ret = devm_request_irq(&pdev->dev, irq_base, amd_gpio_irq_handler, ++ ret = devm_request_irq(&pdev->dev, gpio_dev->irq, amd_gpio_irq_handler, + IRQF_SHARED, KBUILD_MODNAME, gpio_dev); + if (ret) + goto out2; +--- a/drivers/pinctrl/pinctrl-amd.h ++++ b/drivers/pinctrl/pinctrl-amd.h +@@ -98,6 +98,7 @@ struct amd_gpio { + struct resource *res; + struct platform_device *pdev; + u32 *saved_regs; ++ int irq; + }; + + /* KERNCZ configuration*/ diff --git a/queue-5.14/pinctrl-amd-handle-wake-up-interrupt.patch b/queue-5.14/pinctrl-amd-handle-wake-up-interrupt.patch new file mode 100644 index 00000000000..87ec5ddd899 --- /dev/null +++ b/queue-5.14/pinctrl-amd-handle-wake-up-interrupt.patch @@ -0,0 +1,50 @@ +From acd47b9f28e55b505aedb842131b40904e151d7c Mon Sep 17 00:00:00 2001 +From: Basavaraj Natikar +Date: Tue, 31 Aug 2021 17:36:13 +0530 +Subject: pinctrl: amd: Handle wake-up interrupt + +From: Basavaraj Natikar + +commit acd47b9f28e55b505aedb842131b40904e151d7c upstream. + +Enable/disable power management wakeup mode, which is disabled by +default. enable_irq_wake enables wakes the system from sleep. + +Hence added enable/disable irq_wake to handle wake-up interrupt. + +Signed-off-by: Basavaraj Natikar +Tested-by: Mario Limonciello +Acked-by: Shyam Sundar S K +Link: https://lore.kernel.org/r/20210831120613.1514899-3-Basavaraj.Natikar@amd.com +Signed-off-by: Linus Walleij +Signed-off-by: Greg Kroah-Hartman +--- + drivers/pinctrl/pinctrl-amd.c | 10 ++++++++++ + 1 file changed, 10 insertions(+) + +--- a/drivers/pinctrl/pinctrl-amd.c ++++ b/drivers/pinctrl/pinctrl-amd.c +@@ -445,6 +445,7 @@ static int amd_gpio_irq_set_wake(struct + struct gpio_chip *gc = irq_data_get_irq_chip_data(d); + struct amd_gpio *gpio_dev = gpiochip_get_data(gc); + u32 wake_mask = BIT(WAKE_CNTRL_OFF_S0I3) | BIT(WAKE_CNTRL_OFF_S3); ++ int err; + + raw_spin_lock_irqsave(&gpio_dev->lock, flags); + pin_reg = readl(gpio_dev->base + (d->hwirq)*4); +@@ -457,6 +458,15 @@ static int amd_gpio_irq_set_wake(struct + writel(pin_reg, gpio_dev->base + (d->hwirq)*4); + raw_spin_unlock_irqrestore(&gpio_dev->lock, flags); + ++ if (on) ++ err = enable_irq_wake(gpio_dev->irq); ++ else ++ err = disable_irq_wake(gpio_dev->irq); ++ ++ if (err) ++ dev_err(&gpio_dev->pdev->dev, "failed to %s wake-up interrupt\n", ++ on ? "enable" : "disable"); ++ + return 0; + } + diff --git a/queue-5.14/series b/queue-5.14/series index df46d951c98..712592a6b76 100644 --- a/queue-5.14/series +++ b/queue-5.14/series @@ -841,3 +841,8 @@ powerpc-64s-interrupt-fix-check_return_regs_valid-false-positive.patch powerpc-pseries-mobility-ignore-ibm-platform-facilities-updates.patch powerpc-85xx-fix-timebase-sync-issue-when-config_hotplug_cpu-n.patch drm-sun4i-fix-macros-in-sun8i_csc.h.patch +pci-add-pci_exp_devctl_payload_-macros.patch +pci-aardvark-fix-pcie-max-payload-size-setting.patch +sunrpc-partial-revert-of-commit-6f9f17287e78.patch +pinctrl-amd-add-irq-field-data.patch +pinctrl-amd-handle-wake-up-interrupt.patch diff --git a/queue-5.14/sunrpc-partial-revert-of-commit-6f9f17287e78.patch b/queue-5.14/sunrpc-partial-revert-of-commit-6f9f17287e78.patch new file mode 100644 index 00000000000..8023a67e566 --- /dev/null +++ b/queue-5.14/sunrpc-partial-revert-of-commit-6f9f17287e78.patch @@ -0,0 +1,71 @@ +From ea7a1019d8baf8503ecd6e3ec8436dec283569e6 Mon Sep 17 00:00:00 2001 +From: Trond Myklebust +Date: Mon, 12 Jul 2021 09:52:59 -0400 +Subject: SUNRPC: Partial revert of commit 6f9f17287e78 + +From: Trond Myklebust + +commit ea7a1019d8baf8503ecd6e3ec8436dec283569e6 upstream. + +The premise of commit 6f9f17287e78 ("SUNRPC: Mitigate cond_resched() in +xprt_transmit()") was that cond_resched() is expensive and unnecessary +when there has been just a single send. +The point of cond_resched() is to ensure that tasks that should pre-empt +this one get a chance to do so when it is safe to do so. The code prior +to commit 6f9f17287e78 failed to take into account that it was keeping a +rpc_task pinned for longer than it needed to, and so rather than doing a +full revert, let's just move the cond_resched. + +Signed-off-by: Trond Myklebust +Signed-off-by: Greg Kroah-Hartman +--- + net/sunrpc/xprt.c | 28 +++++++++++++++------------- + 1 file changed, 15 insertions(+), 13 deletions(-) + +--- a/net/sunrpc/xprt.c ++++ b/net/sunrpc/xprt.c +@@ -1585,15 +1585,14 @@ xprt_transmit(struct rpc_task *task) + { + struct rpc_rqst *next, *req = task->tk_rqstp; + struct rpc_xprt *xprt = req->rq_xprt; +- int counter, status; ++ int status; + + spin_lock(&xprt->queue_lock); +- counter = 0; +- while (!list_empty(&xprt->xmit_queue)) { +- if (++counter == 20) ++ for (;;) { ++ next = list_first_entry_or_null(&xprt->xmit_queue, ++ struct rpc_rqst, rq_xmit); ++ if (!next) + break; +- next = list_first_entry(&xprt->xmit_queue, +- struct rpc_rqst, rq_xmit); + xprt_pin_rqst(next); + spin_unlock(&xprt->queue_lock); + status = xprt_request_transmit(next, task); +@@ -1601,13 +1600,16 @@ xprt_transmit(struct rpc_task *task) + status = 0; + spin_lock(&xprt->queue_lock); + xprt_unpin_rqst(next); +- if (status == 0) { +- if (!xprt_request_data_received(task) || +- test_bit(RPC_TASK_NEED_XMIT, &task->tk_runstate)) +- continue; +- } else if (test_bit(RPC_TASK_NEED_XMIT, &task->tk_runstate)) +- task->tk_status = status; +- break; ++ if (status < 0) { ++ if (test_bit(RPC_TASK_NEED_XMIT, &task->tk_runstate)) ++ task->tk_status = status; ++ break; ++ } ++ /* Was @task transmitted, and has it received a reply? */ ++ if (xprt_request_data_received(task) && ++ !test_bit(RPC_TASK_NEED_XMIT, &task->tk_runstate)) ++ break; ++ cond_resched_lock(&xprt->queue_lock); + } + spin_unlock(&xprt->queue_lock); + }