From: Akihiko Odaki Date: Thu, 3 Nov 2022 02:54:51 +0000 (+0900) Subject: tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU X-Git-Tag: v7.2.0-rc0~10^2~10 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=ff4f45811fb2ca8f17ef78361128b03dbb679185;p=thirdparty%2Fqemu.git tests/qtest/libqos/e1000e: Set E1000_CTRL_SLU The later device status check depends on E1000_STATUS_LU, which is enabled by E1000_CTRL_SLU. Though E1000_STATUS_LU is not implemented and E1000_STATUS_LU is always available in the current implementation, be a bit nicer and set E1000_CTRL_SLU just in case the bit is implemented in the future. Signed-off-by: Akihiko Odaki Message-Id: <20221103025451.27446-1-akihiko.odaki@daynix.com> Signed-off-by: Thomas Huth --- diff --git a/tests/qtest/libqos/e1000e.c b/tests/qtest/libqos/e1000e.c index 5f800358594..4fd0bd5311e 100644 --- a/tests/qtest/libqos/e1000e.c +++ b/tests/qtest/libqos/e1000e.c @@ -122,7 +122,7 @@ static void e1000e_pci_start_hw(QOSGraphObject *obj) /* Reset the device */ val = e1000e_macreg_read(&d->e1000e, E1000_CTRL); - e1000e_macreg_write(&d->e1000e, E1000_CTRL, val | E1000_CTRL_RST); + e1000e_macreg_write(&d->e1000e, E1000_CTRL, val | E1000_CTRL_RST | E1000_CTRL_SLU); /* Enable and configure MSI-X */ qpci_msix_enable(&d->pci_dev);