From: Emilio G. Cota Date: Wed, 10 Oct 2018 14:48:50 +0000 (-0400) Subject: tcg: access cpu->icount_decr.u16.high with atomics X-Git-Tag: v3.1.0-rc0~45^2~19 X-Git-Url: http://git.ipfire.org/?a=commitdiff_plain;h=fff42f183ea4c3967405d4c1dce6d97dae4d64c8;p=thirdparty%2Fqemu.git tcg: access cpu->icount_decr.u16.high with atomics Consistently access u16.high with atomics to avoid undefined behaviour in MTTCG. Note that icount_decr.u16.low is only used in icount mode, so regular accesses to it are OK. Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Message-Id: <20181010144853.13005-2-cota@braap.org> Signed-off-by: Richard Henderson --- diff --git a/accel/tcg/tcg-all.c b/accel/tcg/tcg-all.c index 56dbb56a165..3d25bdcc175 100644 --- a/accel/tcg/tcg-all.c +++ b/accel/tcg/tcg-all.c @@ -51,7 +51,7 @@ static void tcg_handle_interrupt(CPUState *cpu, int mask) if (!qemu_cpu_is_self(cpu)) { qemu_cpu_kick(cpu); } else { - cpu->icount_decr.u16.high = -1; + atomic_set(&cpu->icount_decr.u16.high, -1); if (use_icount && !cpu->can_do_io && (mask & ~old_mask) != 0) { diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index ad5c7582467..356dcd0948b 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -2341,7 +2341,7 @@ void cpu_interrupt(CPUState *cpu, int mask) { g_assert(qemu_mutex_iothread_locked()); cpu->interrupt_request |= mask; - cpu->icount_decr.u16.high = -1; + atomic_set(&cpu->icount_decr.u16.high, -1); } /* diff --git a/qom/cpu.c b/qom/cpu.c index f7746546d0b..9ad1372d57c 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -265,7 +265,7 @@ static void cpu_common_reset(CPUState *cpu) cpu->mem_io_pc = 0; cpu->mem_io_vaddr = 0; cpu->icount_extra = 0; - cpu->icount_decr.u32 = 0; + atomic_set(&cpu->icount_decr.u32, 0); cpu->can_do_io = 1; cpu->exception_index = -1; cpu->crash_occurred = false;