Alan Modra [Mon, 18 Mar 2019 11:08:36 +0000 (21:38 +1030)]
PR24355, segmentation fault in function called from ppc_finish_symbols
This one looks to be a bug going back to 2009, git commit e054468f6c
"STT_GNU_IFUNC support for PowerPC". That bug was carried over with
git commit 49c09209d0 "Rearrange PLT reloc output on powerpc".
If the refcount for an ifunc local sym plt entry was zero,
ppc_elf_size_dynamic_sections would correctly set plt.offset to -1 but
leave glink_offset uninitialized. That leads to occasional segfaults
(which can be made solid with MALLOC_PERTURB_=1 when using glibc).
So, guard the write_glink_stub call with plt.offset != -1. Also,
remove the totally ineffective attempt at writing multiple-use glink
stubs only once.
PR 24355
* elf32-ppc.c (ppc_finish_symbols): Don't call write_glink_stub
for local iplt syms with ent->plt.offset == -1. Remove ineffective
attempt at writing glink stubs only once.
x86: Rewrite NOP generation for fill and alignment
increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase
of assembler time and memory usage by 5 times for inputs with many
.p2align directives, which is typical for LTO output. This patch passes
max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set
as needed and tracked by backend it so that HANDLE_ALIGN can check the
maximum alignment for each rs_align_code frag. Wall time to assemble
the same cc1plus.s:
before:
423.78user 0.89system 7:05.71elapsed 99%CPU
after:
102.35user 0.27system 1:42.89elapsed 99%CPU
PR gas/24165
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
(alignment ? ((1 << alignment) - 1) : 1)
(i386_tc_frag_data): Add max_bytes.
(TC_FRAG_INIT): Track max_chars in max_bytes.
(HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
fragP->tc_frag_data.max_bytes.
removed check R_X86_64_PC32 relocation against protected symbols in
shared objects. Since elf_x86_64_check_relocs is called after we
have seen all input files, we can check for PC-relative relocations in
elf_x86_64_check_relocs. We should not allow PC-relative relocations
against protected symbols since address of protected function and
location of protected data may not be in the shared object.
bfd/
PR ld/24151
* elf64-x86-64.c (elf_x86_64_need_pic): Check
SYMBOL_DEFINED_NON_SHARED_P instead of def_regular.
(elf_x86_64_relocate_section): Move PIC check for PC-relative
relocations to ...
(elf_x86_64_check_relocs): Here.
(elf_x86_64_finish_dynamic_symbol): Use SYMBOL_DEFINED_NON_SHARED_P
to check if a symbol is defined in a non-shared object.
* elfxx-x86.h (SYMBOL_DEFINED_NON_SHARED_P): New.
ld/
PR ld/24151
* testsuite/ld-x86-64/pr24151a-x32.d: New file.
* testsuite/ld-x86-64/pr24151a.d: Likewise.
* testsuite/ld-x86-64/pr24151a.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24151a and pr24151a-x32.
Tamar Christina [Thu, 7 Feb 2019 17:12:23 +0000 (17:12 +0000)]
Arm: Backport hlt to all architectures.
The software trap instruction HLT that was introduced in Armv8-a is used
as the semihosting trap instruction in AArch64. In order to allow systems
configured to run AArch64 code to also run AArch32 with semihosting it was
decided that AArch32 should also use HLT in the case of the "mixed mode"
environment. This requires that HLT also be backported to all earlier
architectures. The instruction is in the undefined encoding space earlier
architectures but must trigger a semihosting trap [3].
The Arm Architectural Reference Manual [1] doesn't explicitly mention this
however this is an explicit requirement in the Semihosting-v2 protocol [2].
* config/tc-arm.c (insns): Redefine THUMB_VARIANT and ARM_VARIANT for
hlt to armv1.
* testsuite/gas/arm/armv8a-automatic-hlt.d: Update TAGs
* testsuite/gas/arm/hlt.d: New test.
* testsuite/gas/arm/hlt.s: New test.
Eric Botcazou [Thu, 7 Feb 2019 16:04:31 +0000 (17:04 +0100)]
SPARC: fix PR ld/18841
This fixes the last ld failures on SPARC64/Linux:
FAIL: Run pr18841 with libpr18841b.so
FAIL: Run pr18841 with libpr18841c.so
FAIL: Run pr18841 with libpr18841bn.so (-z now)
FAIL: Run pr18841 with libpr18841cn.so (-z now)
by mimicing what has been done on x86-64 and Aarch64 to fix the PR.
Andreas Krebbel [Thu, 31 Jan 2019 16:01:27 +0000 (17:01 +0100)]
S/390: Implement instruction set extensions
opcodes/ChangeLog:
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
* s390-mkopc.c (main): Accept arch13 as cpu string.
* s390-opc.c: Add new instruction formats and instruction opcode
masks.
* s390-opc.txt: Add new arch13 instructions.
include/ChangeLog:
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
* config/tc-s390.c (s390_parse_cpu): New entry for arch13.
* doc/c-s390.texi: Document arch13 march option.
* testsuite/gas/s390/s390.exp: Run the arch13 related tests.
* testsuite/gas/s390/zarch-arch13.d: New test.
* testsuite/gas/s390/zarch-arch13.s: New test.
* testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics
also for z13.
Alan Modra [Thu, 31 Jan 2019 04:08:45 +0000 (14:38 +1030)]
Assorted warning fixes
gcc-9 flagged warnings at the places I'm patching here, all real bugs.
* config/tc-alpha.c (md_apply_fix): Correct range checks for
BFD_RELOC_ALPHA_NOP, BFD_RELOC_ALPHA_LDA, BFD_RELOC_ALPHA_BSR.
* config/tc-arm.c (md_apply_fix): Use llabs rather than abs.
* config/tc-csky.c (get_macro_reg_vals): Pass s to csky_show_error.
Max Filippov [Sat, 26 Jan 2019 02:52:32 +0000 (18:52 -0800)]
xtensa: gas: don't keep relocations for constants
xtensa gas chokes on 8/16 bit data entries representing constant symbols
because it leaves BFD_RELOC_8/BFD_RELOC_16 fixups for which xtensa BFD
cannot emit relocations. Resolve fixups for constant symbols in
md_apply_fix.
gas/
2019-01-29 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (md_apply_fix): Mark fixups for constant
symbols as done in md_apply_fix.
* testsuite/gas/all/forward.d: Don't XFAIL for xtensa.
Nick Clifton [Tue, 29 Jan 2019 11:20:02 +0000 (11:20 +0000)]
Fix error in expression evalutation in linker output maps.
PR 24008
* ldexp.h (lang_phase_type): Add lang_fixed_phase_enum.
* ldexp.c (fold_name): Move expld.assign_name check later to
avoid an extra lookup.
(exp_fold_tree_1): When lang_fixed_phase_enum, don't change symbol
values, and don't clear expld.assign_name.
* ldlang.c (lang_map): Set expld.phase to lang_fixed_phase_enum.
(print_assignment): Resolve entire assignment expression.
Don't access symbol u.def unless symbol is defined.
Sudi Das [Fri, 25 Jan 2019 14:28:07 +0000 (14:28 +0000)]
AArch64: Update encodings for stg, st2g, stzg and st2zg.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch updates the st*g instructions
to use a previously reserved field for a new register operand. Thus the
new versions of the instructions are as follows:
Sudi Das [Fri, 25 Jan 2019 14:15:45 +0000 (14:15 +0000)]
AArch64: Add new STZGM instruction for Armv8.5-A Memory Tagging Extension.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch adds the new STZGM instruction.
STGZM Xt, [<Xn|SP>]
Committed on behalf of Sudakshina Das.
*** gas/ChangeLog ***
* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for stzgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
Sudi Das [Fri, 25 Jan 2019 13:57:14 +0000 (13:57 +0000)]
AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Extension.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch removes the LDGV and STGV
instructions. These instructions needed special infrastructure to support
[base]! style for addressing mode. That is also removed now.
Committed on behalf of Sudakshina Das.
*** gas/ChangeLog ***
* config/tc-aarch64.c (parse_address_main): Remove support for
[base]! address expression.
(parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2.
(warn_unpredictable_ldst): Remove support for ldstgv_indexed.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv
and stgv.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
projects / thirdparty / binutils-gdb.git / log
