Tom Rini [Wed, 20 Aug 2025 17:07:22 +0000 (11:07 -0600)]
Merge patch series "Add support for Ethernet boot"
Chintan Vankar <c-vankar@ti.com> says:
This series adds bind method for CPSW to avoid explicit probing, removes
explicit probing of CPSW, adds support for Ethernet boot on SK-AM68,
SK-AM62P-LP, J722S, SK-AM69.
net: ti: Kconfig: Enable SPL_SYSCON config for CPSW
TI's Ethernet switch needs system controllers enabled in R5SPL stage while
booting via Ethernet. Enable SPL_SYSCON config for
CONFIG_TI_AM65_CPSW_NUSS.
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Bind method of "am65_cpsw_nuss" driver will ensure binding of it's child
driver "am65_cpsw_nuss_ports", and there is no need to probe CPSW driver
explicitly.
Bind method of "am65_cpsw_nuss" driver will ensure binding of it's child
driver "am65_cpsw_nuss_ports", and there is no need to probe CPSW driver
explicitly.
Bind method of am65_cpsw_nuss driver will ensure binding of it's child
driver am65_cpsw_nuss_ports, and there is no need to call CPSW driver
explicitly. Remove explicit probing of CPSW driver for AM62x.
net: ti: am65-cpsw-nuss: Define bind method for CPSW driver
CPSW driver is defined as UCLASS_MISC driver which needs to be probed
explicitly. Define bind method for CPSW driver to scan and bind
ethernet-ports with UCLASS_ETH driver which will eventually probe CPSW
driver and avoid probing CPSW driver explicitly.
Tom Rini [Tue, 19 Aug 2025 17:26:39 +0000 (11:26 -0600)]
Merge patch series "ram: k3-ddrss: Support partial inline ECC"
Neha Malcom Francis <n-francis@ti.com> says:
Currently, the inline ECC implementation enables inline ECC across the
entire DDR space. However this is not always required and a more common
ask is to have only a portion of the DDR protected as enabling ECC
impacts read/write performance metrics.
This series aims to modify the logic to firstly support partial inline
ECC in its' most basic form which works for single controllers. Then it
introduces an algorithm to support multi DDR controllers where
interleaving plays a role. Since interleaving is handled by the MSMC, it
only makes sense to have the MSMC decide the inline ECC ranges for each
DDR.
This series also introduces support for multiple partial regions of inline
ECC however due to complexity only support for single DDR is present now.
WIP: A commandline test case patch for verifying the correct behaviour
of inline ECC including partial case. Was targeted for v2 however a little
tricky to make it a general test case especially for multi-DDR cases, so
have not combined it in this series for now.
Testing:
- Memtester runs for J721S2 and J784S4 platforms with and without ECC
enablement runs fine.
- Along with patches that add support for the commandline test (see WIP
note above) J784S4 shows expected behavior for three sets of partial
inline ECC regions (non-overlapping, and after modifying J784S4 to
have single DDR instead of multi-DDR):
https://gist.github.com/nehamalcom/bde7e14e96485e4a188c3af3af6d75d6
ram: k3-ddrss: Add support for partial inline ECC in multi-DDR systems
The existing approach does not account for interleaving in the DDRs when
setting up regions. There is support for MSMC to calculate the regions
for each DDR, so modify k3_ddrss_probe to set the regions accordingly
for multi-DDR systems.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for MSMC calculation of DDR inline ECC regions
Add support for calculation of the protected regions for each DDR in
multi-DDR systems. Since MSMC is the parent node of the individual DDRs
as well as responsible for their interleaving, it only makes sense for
MSMC to contain the logic for dividing the regions.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add support for number of controllers under MSMC
In K3 multi-DDR systems, the MSMC is responsible for the interleave
mechanism across all the DDR controllers. Add support for MSMC to obtain
the number of controllers it's responsible for using the DT.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
As we increase the functionalities that the K3 DDRSS sub-system support,
it is becoming more evident that the same logic cannot apply to both
single as well as multiple DDR controller devices. Add
CONFIG_K3_MULTI_DDR to be used to differentiate between the two.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Add comment about ecc_reserved_space
The reserved space needed for storing the parity remains the same no
matter the size of the region that is being protected. Add this as a
comment for better code understanding.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
To prevent checkpatch warning once we start using this macro more
frequently, shorten the length of it. While at it, also move the
structure k3_ddrss_ecc_region above k3_msmc so that future patches can
have it as a member of k3_msmc.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
ram: k3-ddrss: Use DDR address instead of system address for ecc_regions
Let ecc_regions[x].start reflect the start of the ECC region in terms of
DDR addressing rather than system addressing. This will make it easier
to extend the usage of the same ecc_regions structure for multi-DDR
systems as well.
Reviewed-by: Udit Kumar <u-kumar1@ti.com> Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Andrew Goodbody [Tue, 12 Aug 2025 10:13:50 +0000 (11:13 +0100)]
soc: ti: k3-navss-ringacc: Do not use uninitialised variable
In k3_nav_ringacc_probe_dt there can be no error code returned from
dev_read_u32_default so ret is not assigned to and should not be used.
Remove the use of ret from the dev_err call as it is unitialised.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Fri, 8 Aug 2025 12:00:22 +0000 (13:00 +0100)]
remoteproc: ti_k3_arm64: Cannot set or compare u8 to 16bits
In the struct ti_sci_proc the fields proc_id and host_id are declared as
u8 so cannot be set to nor compared with a macro defined with a value
using 16 bits. Change the macro to only use 8 bits to make the code work
as expected.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Tom Rini [Tue, 12 Aug 2025 17:59:08 +0000 (11:59 -0600)]
sandbox: Add generic asm/atomic.h
In order to compile code that uses <asm/atomic.h> on sandbox, we must
provide this header. RISC-V shows us today how to do so with the generic
header implementation, so copy that.
Normally, local_save_flags is used as part of the local_irq_* macros, so
remove that as it's unused. Make local_irq_save do something to the
passed variable so that it won't trigger unused variable warnings later.
Andrew Goodbody [Tue, 12 Aug 2025 10:36:53 +0000 (11:36 +0100)]
sound: rt5677: Cannot test unsigned for being negative
In rt5677_bic_or the call to rt5677_i2c_read returns an int so old
should also be an int to receive that value and then be able to test it
for being negative which would indicate an error.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Thu, 7 Aug 2025 09:16:55 +0000 (10:16 +0100)]
pinctrl: nexell: Cannot test unsigned to be negative
In s5pxx18_pinctrl_set_state testing count to be negative will always
fail as count is unsigned despite receiving the return value of a
function that returns an int. Change count and idx to be of type int to
allow the test to work as expected and remove the need for any implicit
casts. Also change pin to be u32 which is what all called functions
expect.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
efi_capsule_data() is called in each of the EFI tests to create and
setup the files we need. However, it also recreates the spi.bin file
that holds the SPI flash contents we rely on for the test validation.
This leads to weird errors since reading from the flash returns 0,
instead of the expected value if the file has been recreated.
Always restart our sandbox instance if the files are recreated.
test/py: Read from the correct offset when initializing capsules
The current code writes values to a flash offset defined by a function
argument. However, when reading it back we always read from a static
offset. Adjust the reads to use the correct offset.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
test/py: Correctly restore the DT after capsule tests
Some capsule tests are changing the sandbox DT to test various features,
e.g authenticated capsule updates, versioning support etc. However, no one
restores the original DT and the CI pops errors looking like
/u-boot
Bloblist at 100 not found (err=-2)
Failed to find FDT file '/tmp/sandbox/persistent-data/scratch/EFI/CapsuleTestData/test_ver.dtb'
initcall_run_f(): initcall fdtdec_setup() failed
if sandbox is restarted.
So let's restore the proper DT after done with the capsule testing.
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Jim Liu [Thu, 7 Aug 2025 05:32:24 +0000 (13:32 +0800)]
configs: npcm: remove CONFIG_SYS_SKIP_UART_INIT
Set the uart clock frequency according to dts by default.
If CONFIG_SYS_SKIP_UART_INIT is not enabled, no need to
do board_set_console to change the console bootarg.
If there is an unhandled KCS/BPC pending interrupt after reboot,
the KCS/BPC Linux driver may trigger interrupts immediately upon
registering the irq. However, since the driver is not yet initialized
to handle them, this can lead to unexpected behavior.
To prevent this, disable KCS/BPC interrupts in u-boot to avoid pending
interrupts from being raised before the Linux driver is fully initialized.
Signed-off-by: Stanley Chu <yschu@nuvoton.com> Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Jim Liu [Thu, 7 Aug 2025 05:32:22 +0000 (13:32 +0800)]
misc: npcm_host_intf: Add Arbel eSPI workaround
Enabling an eSPI channel(e.g. Peripheral Channel) during
an eSPI transaction might cause the BMC eSPI module to
transition to a wrong state and therefore respond with
FATAL_ERROR on incoming transaction.
Add workaround to avoid the module getting into the wrong
state.
Signed-off-by: Stanley Chu <yschu@nuvoton.com> Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
When doing a dm_i2c_read followed by a dm_i2c_write, the subsequent
transaction may get npcm_i2c_check_sda error because the module is
still busy in STOP condition in previous dm_i2c_read.
Always check and wait for module to be out of busy before starting
an i2c transaction.
Signed-off-by: Stanley Chu <yschu@nuvoton.com> Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
Andrew Goodbody [Thu, 7 Aug 2025 10:04:02 +0000 (11:04 +0100)]
pinctrl: single: Remove unreachable code
In single_read there is a switch block with a default label. All cases
in the switch block, including the default, return directly. So any code
following the switch block is unreachable. Remove the unreachable code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Wed, 6 Aug 2025 17:03:26 +0000 (18:03 +0100)]
phy: ti: j721e-wiz: Set error code before goto
In j721e_wiz_probe the test for too many lanes jumps to the error exit
path without assigning an error code which could lead to calling code
silently ignoring the failure. Set the error code.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Wed, 6 Aug 2025 10:43:47 +0000 (11:43 +0100)]
net: ti: am65-cpsw-nuss: Initialise ret
In am65_cpsw_phy_init it is not certain that ret will be assigned to
before it reaches the 'return ret' statement. Initialise ret to ensure
that ret is valid.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Andrew Goodbody [Tue, 5 Aug 2025 16:10:26 +0000 (17:10 +0100)]
net: phy: cortina: Ensure memory allocated is freed
In cs4340_upload_firmware a buffer is allocated with malloc but this is
never freed. The pointer to this buffer, addr, is not even kept
unchanged. But in some cases addr is not a buffer allocated by malloc.
Introduce the use of another pointer to keep track of the buffer and to
know if it needs to be freed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Tom Rini [Mon, 4 Aug 2025 21:57:11 +0000 (15:57 -0600)]
rtc: mc146818: Fix building on more architectures
This driver makes calls to in8/out8(). On PowerPC these are separate and
real calls but elsewhere they are able to simply be wrappers to
inb/outb. Rework this logic to be able to build this driver on more
platforms.
Tom Rini [Mon, 4 Aug 2025 21:51:11 +0000 (15:51 -0600)]
sm: Rework the Kconfig logic here
The symbol "SM" is a library symbol and should not be prompted for. It
should be selected by the drivers that use it. In this case we need to
add a SANDBOX_SM symbol for the sandbox driver. The meson SM driver
cannot build on other platforms, so add the appropriate dependency.
Reviewed-by: Peter Robinson <pbrobinson@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Andrew Goodbody [Mon, 4 Aug 2025 15:32:51 +0000 (16:32 +0100)]
net: e1000: Free temporary buffer on exit
In do_e1000_spi_checksum a temporary buffer is allocated but never
freed. Add code to free on exit. Also refactor the code to make the exit
code common.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
rockchip: add /chosen/bootsource to U-Boot proper DT
U-Boot typically can be loaded from different storage media, such as
eMMC, SD card, SPI flash, but also from non-persistent media such as USB
(via proprietary protocols loading directly into SRAM, or fastboot, DFU,
etc..), JTAG, ...
This information is usually reported by the BootROM via some proprietary
mechanism (some specific address in registers/DRAM for example). For
Rockchip, that information is stored in a register
(BROM_BOOTSOURCE_ID_ADDR).
While we already have the information about which medium was used to
load U-Boot proper from SPL (via /chosen/u-boot,spl-boot-device), this
new property represents the medium used to load U-Boot first phase
(depending on configuration, can be VPL/TPL/SPL) which absolutely may
differ from the one used to load U-Boot proper!
It would be useful to know which medium was used to load the first phase
of U-Boot, for example to check fallback mechanisms (proper loaded from
a different medium than first phase) are actually working.
For now, this only applies to Rockchip's U-Boot proper DT but could be
applied to the kernel's as well and possibly for other architectures or
vendors.
Andrew Goodbody [Fri, 25 Jul 2025 11:48:22 +0000 (12:48 +0100)]
gpio: dwapb_gpio: Using wrong function to free memory
In gpio_dwapb_bind plat is used to reference memory allocated by
devm_kcalloc but it is attempted to be freed using kfree. Instead free
this memory using the correct devm_kfree function.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Andrew Goodbody [Fri, 25 Jul 2025 10:41:12 +0000 (11:41 +0100)]
clk: cdce9xx: Fix use of dev_read_u32_default
The function dev_read_u32_default does not return an error and the
variable 'val' is unsigned so testing for >= 0 will always be true. It
looks like the code was attempting to return -1 if xtal-load-pf was not
present but that cannot work. Instead use dev_read_u32 which returns an
error code separately from writing the value into the passed pointer.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Fixes: 260777fc2333 ("clk: cdce9xx: add support for cdce9xx clock synthesizer") Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Fri, 18 Jul 2025 01:15:52 +0000 (19:15 -0600)]
sandbox: Add more dummy functions to mimic other architectures
This adds more common functions found on other architectures that will
allow for more compile-testing of drivers. These are either dummy
functions as we do not need them or mappings to existing functions,
similar to how other architectures handle it.
We switched towards standard boot with still keeping a fallback
using legacy boot command alive. Add a deprecation warning to
make it more clear that we will remove it in future versions.
board: phytec: phycore-am62ax: Add watchdog start to bootcmd
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
board: phytec: phycore-am64x: Add watchdog start to bootcmd
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
board: phytec: phycore-am62x: Add watchdog start to bootcmd
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
projects / thirdparty / u-boot.git / log
