David Edelsohn [Tue, 24 Aug 2021 20:48:57 +0000 (16:48 -0400)]
aix: SYSTEM_IMPLICIT_EXTERN_C
AIX 7.3 system headers are C++ safe and GCC no longer needs to define
SYSTEM_IMPLICIT_EXTERN_C for AIX 7.3. This patch moves the definition
from aix.h to the individual OS-level configuration files and does not
define the macro for AIX 7.3.
The patch also corrects the definition of TARGET_AIX_VERSION to 73.
Roger Sayle [Tue, 24 Aug 2021 21:07:41 +0000 (22:07 +0100)]
[Committed] PR middle-end/102031: Fix typo/mistake in simplify_truncation patch.
My apologies again. My patch to simplify truncations of SUBREGs in
simplify-rtx.c contained an error where I'd accidentally compared
against a mode instead of the precision of that mode. Grr! It even
survived regression testing on two platforms. Fixed below, and
committed as obvious, after a full "make bootstrap" and "make -k check"
on x86_64-pc-linux-gnu with no new regressions.
2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
PR middle-end/102031
* simplify-rtx.c (simplify_truncation): When comparing precisions
use "subreg_prec" variable, not "subreg_mode".
Harald Anlauf [Tue, 24 Aug 2021 19:07:50 +0000 (21:07 +0200)]
Fortran: fix pointless warning for static variables
gcc/fortran/ChangeLog:
PR fortran/98411
* trans-decl.c (gfc_finish_var_decl): Adjust check to handle
implicit SAVE as well as variables in the main program. Improve
warning message text.
gcc/testsuite/ChangeLog:
PR fortran/98411
* gfortran.dg/pr98411.f90: Adjust testcase options to restrict to
F2008, and verify case of implicit SAVE.
Bill Schmidt [Tue, 24 Aug 2021 16:50:09 +0000 (11:50 -0500)]
rs6000: Add more type nodes to support builtin processing
2021-08-24 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-call.c (rs6000_init_builtins): Initialize
various pointer type nodes.
* config/rs6000/rs6000.h (rs6000_builtin_type_index): Add enum
values for various pointer types.
(ptr_V16QI_type_node): New macro.
(ptr_V1TI_type_node): New macro.
(ptr_V2DI_type_node): New macro.
(ptr_V2DF_type_node): New macro.
(ptr_V4SI_type_node): New macro.
(ptr_V4SF_type_node): New macro.
(ptr_V8HI_type_node): New macro.
(ptr_unsigned_V16QI_type_node): New macro.
(ptr_unsigned_V1TI_type_node): New macro.
(ptr_unsigned_V8HI_type_node): New macro.
(ptr_unsigned_V4SI_type_node): New macro.
(ptr_unsigned_V2DI_type_node): New macro.
(ptr_bool_V16QI_type_node): New macro.
(ptr_bool_V8HI_type_node): New macro.
(ptr_bool_V4SI_type_node): New macro.
(ptr_bool_V2DI_type_node): New macro.
(ptr_bool_V1TI_type_node): New macro.
(ptr_pixel_type_node): New macro.
(ptr_intQI_type_node): New macro.
(ptr_uintQI_type_node): New macro.
(ptr_intHI_type_node): New macro.
(ptr_uintHI_type_node): New macro.
(ptr_intSI_type_node): New macro.
(ptr_uintSI_type_node): New macro.
(ptr_intDI_type_node): New macro.
(ptr_uintDI_type_node): New macro.
(ptr_intTI_type_node): New macro.
(ptr_uintTI_type_node): New macro.
(ptr_long_integer_type_node): New macro.
(ptr_long_unsigned_type_node): New macro.
(ptr_float_type_node): New macro.
(ptr_double_type_node): New macro.
(ptr_long_double_type_node): New macro.
(ptr_dfloat64_type_node): New macro.
(ptr_dfloat128_type_node): New macro.
(ptr_ieee128_type_node): New macro.
(ptr_ibm128_type_node): New macro.
(ptr_vector_pair_type_node): New macro.
(ptr_vector_quad_type_node): New macro.
(ptr_long_long_integer_type_node): New macro.
(ptr_long_long_unsigned_type_node): New macro.
Roger Sayle [Tue, 24 Aug 2021 17:02:18 +0000 (18:02 +0100)]
nvptx: Add a __PTX_SM__ predefined macro based on target ISA.
This patch adds a __PTX_SM__ predefined macro to the nvptx backend that
allows code to check the compute model being targeted by the compiler.
This is equivalent to the __CUDA_ARCH__ macro defined by CUDA's nvcc
compiler, but to avoid causing problems for source code that checks
for that compiler, this macro uses GCC's nomenclature; it's easy
enough for users to "#define __CUDA_ARCH__ __PTX_SM__".
What might have been a four line patch is actually a little more
complicated, as this patch takes the opportunity to upgrade the
nvptx backend to use the now preferred nvptx-c.c idiom.
2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
Tom de Vries <tdevries@suse.de>
gcc/ChangeLog
* config.gcc (nvptx-*-*): Define {c,c++}_target_objs.
* config/nvptx/nvptx-protos.h (nvptx_cpu_cpp_builtins): Prototype.
* config/nvptx/nvptx.h (TARGET_CPU_CPP_BUILTINS): Implement with
a call to the new nvptx_cpu_cpp_builtins function in nvptx-c.c.
* config/nvptx/t-nvptx (nvptx-c.o): New rule.
* config/nvptx/nvptx-c.c: New source file.
(nvptx_cpu_cpp_builtins): Move implementation here.
Martin Sebor [Tue, 24 Aug 2021 16:49:11 +0000 (10:49 -0600)]
Reset PHI base0 flag if it's clear in any argument [PR101977, ...]
Resolves:
PR middle-end/101600 - Spurious -Warray-bounds downcasting a polymorphic pointer
PR middle-end/101977 - bogus -Warray-bounds on a negative index into a parameter in conditional with null
gcc/ChangeLog:
PR middle-end/101600
PR middle-end/101977
* gimple-ssa-warn-access.cc (maybe_warn_for_bound): Tighten up
the phrasing of a warning.
(check_access): Use the remaining size after subtracting any offset
rather than the whole object size.
* pointer-query.cc (access_ref::get_ref): Clear BASE0 flag if it's
clear for any nonnull PHI argument.
(compute_objsize): Clear argument.
gcc/testsuite/ChangeLog:
PR middle-end/101600
PR middle-end/101977
* g++.dg/pr100574.C: Prune out valid warning.
* gcc.dg/pr20126.c: Same.
* gcc.dg/Wstringop-overread.c: Adjust text of expected warnings.
Add new instances.
* gcc.dg/warn-strnlen-no-nul.c: Same.
* g++.dg/warn/Warray-bounds-26.C: New test.
* gcc.dg/Warray-bounds-88.c: New test.
Jonathan Wakely [Tue, 24 Aug 2021 13:42:37 +0000 (14:42 +0100)]
libstdc++: Add std::is_layout_compatible trait for C++20
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
* include/std/type_traits (is_layout_compatible): Define.
(is_corresponding_member): Define.
* include/std/version (__cpp_lib_is_layout_compatible): Define.
* testsuite/20_util/is_layout_compatible/is_corresponding_member.cc:
New test.
* testsuite/20_util/is_layout_compatible/value.cc: New test.
* testsuite/20_util/is_layout_compatible/version.cc: New test.
* testsuite/20_util/is_pointer_interconvertible/with_class.cc:
New test.
* testsuite/23_containers/span/layout_compat.cc: Do not use real
std::is_layout_compatible trait if available.
H.J. Lu [Mon, 23 Aug 2021 21:47:03 +0000 (14:47 -0700)]
x86: Broadcast from integer to a pseudo vector register
Broadcast from integer to a pseudo vector register instead of a hard
vector register to allow LRA to remove redundant move instruction after
broadcast.
gcc/
PR target/102021
* config/i386/i386-expand.c (ix86_expand_vector_move): Broadcast
from integer to a pseudo vector register.
Richard Biener [Tue, 24 Aug 2021 10:25:25 +0000 (12:25 +0200)]
tree-optimization/100089 - avoid leaving scalar if-converted code around
This avoids leaving scalar if-converted code around for the case
of BB vectorizing an if-converted loop body when using the very-cheap
cost model. In this case we scan not vectorized scalar stmts in
the basic-block vectorized for COND_EXPRs and force the vectorization
to be marked as not profitable.
The patch also makes sure to always consider all BB vectorization
subgraphs together for costing purposes when vectorizing an
if-converted loop body.
2021-08-24 Richard Biener <rguenther@suse.de>
PR tree-optimization/100089
* tree-vectorizer.h (vect_slp_bb): Rename to ...
(vect_slp_if_converted_bb): ... this and get the original
loop as new argument.
* tree-vectorizer.c (try_vectorize_loop_1): Revert previous fix,
pass original loop to vect_slp_if_converted_bb.
* tree-vect-slp.c (vect_bb_vectorization_profitable_p):
If orig_loop was passed scan the not vectorized stmts
for COND_EXPRs and force not profitable if found.
(vect_slp_region): Pass down all SLP instances to costing
if orig_loop was specified.
(vect_slp_bbs): Pass through orig_loop.
(vect_slp_bb): Rename to ...
(vect_slp_if_converted_bb): ... this and get the original
loop as new argument.
(vect_slp_function): Adjust.
Richard Earnshaw [Fri, 18 Jun 2021 16:18:37 +0000 (17:18 +0100)]
arm: fix vlldm erratum for Armv8.1-m [PR102035]
For Armv8.1-m we generate code that emits VLLDM directly and do not
rely on support code in the library, so emit the mitigation directly
as well, when required. In this case, we can use the compiler options
to determine when to apply the fix and when it is safe to omit it.
gcc:
PR target/102035
* config/arm/arm.md (attribute arch): Add fix_vlldm.
(arch_enabled): Use it.
* config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to
use when erratum mitigation is needed.
Richard Earnshaw [Fri, 18 Jun 2021 16:16:25 +0000 (17:16 +0100)]
arm: add erratum mitigation to __gnu_cmse_nonsecure_call [PR102035]
Add the recommended erratum mitigation sequence to
__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
is in the library code we cannot know in advance whether the core we
are running on will be affected by this, so always enable it.
Richard Earnshaw [Fri, 11 Jun 2021 15:02:05 +0000 (16:02 +0100)]
arm: Add command-line option for enabling CVE-2021-35465 mitigation [PR102035]
Add a new option, -mfix-cmse-cve-2021-35465 and document it. Enable it
automatically for cortex-m33, cortex-m35p and cortex-m55.
gcc:
PR target/102035
* config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option.
* doc/invoke.texi (Arm Options): Document it.
* config/arm/arm-cpus.in (quirk_vlldm): New feature bit.
(ALL_QUIRKS): Add quirk_vlldm.
(cortex-m33): Add quirk_vlldm.
(cortex-m35p, cortex-m55): Likewise.
* config/arm/arm.c (arm_option_override): Enable fix_vlldm if
targetting an affected CPU and not explicitly controlled on
the command line.
Richard Earnshaw [Fri, 18 Jun 2021 16:13:04 +0000 (17:13 +0100)]
arm: testsuite: improve detection of CMSE hardware.
The test for CMSE support being available in hardware currently
relies on the compiler not optimizing away a secure gateway operation.
But even that is suspect, because the SG instruction is just a NOP
on armv8-m implementations that do not support the security extension.
Replace the existing test with a new one that reads and checks
the appropriate hardware feature register (memory mapped). This has
to be run from secure mode, but that shouldn't matter, because if we
can't do that we can't really test the CMSE extensions anyway. We
retain the SG instruction to ensure the test can't pass accidentally
if run on pre-armv8-m devices.
gcc/testsuite:
* lib/target-supports.exp (check_effective_target_arm_cmse_hw):
Check the CMSE feature register, rather than relying on the
SG operation causing an execution fault.
Richard Earnshaw [Fri, 11 Jun 2021 16:18:12 +0000 (17:18 +0100)]
arm: Fix general issues with patterns for VLLDM and VLSTM
Both lazy_store_multiple_insn and lazy_load_multiple_insn contain
invalid RTL (eg they contain a post_inc statement outside of a mem).
What's more, the instructions concerned do not modify their input
address register. We probably got away with this because they are
generated so late in the compilation that no subsequent pass needed to
understand them. Nevertheless, this could cause problems someday, so
fixed to use a simple legal unspec.
gcc:
* config/arm/vfp.md (lazy_store_multiple_insn): Rewrite as valid RTL.
(lazy_load_multiple_insn): Likewise.
Richard Biener [Mon, 23 Aug 2021 12:15:14 +0000 (14:15 +0200)]
Adjust inner loop cost scaling
This makes use of the estimated number of iterations of the inner loop
to limit --param vect-inner-loop-cost-factor scaling. It also reduces
the maximum value of vect-inner-loop-cost-factor to 10000 making it
less likely to cause overflow of costs.
2021-08-23 Richard Biener <rguenther@suse.de>
* doc/invoke.texi (vect-inner-loop-cost-factor): Adjust.
* params.opt (--param vect-inner-loop-cost-factor): Adjust
maximum value.
* tree-vect-loop.c (vect_analyze_loop_form): Initialize
inner_loop_cost_factor to the minimum of the estimated number
of iterations of the inner loop and vect-inner-loop-cost-factor.
Andrew Pinski [Tue, 24 Aug 2021 05:56:59 +0000 (05:56 +0000)]
Fix a few problems with download_prerequisites.
There are a few problems with download_prerequisites are
described in PR 82704. The first is on busy-box version of
shasum and md5sum the extended option --check don't exist
so just use -c. The second issue is the code for which
shasum program to use is included twice and is different.
So move which program to use for the checksum after argument
parsing. The last issue is --md5 option has been broken for
sometime now as the program is named md5sum and not just md5.
Nobody updated switch table to be correct.
contrib/ChangeLog:
PR other/82704
* download_prerequisites: Fix issues with --md5 and
--sha512 options.
Roger Sayle [Tue, 24 Aug 2021 02:04:48 +0000 (03:04 +0100)]
Tweak -Os costs for scalar-to-vector pass.
Back in June I briefly mentioned in one of my gcc-patches posts that
a change that should have always reduced code size, would mysteriously
occasionally result in slightly larger code (according to CSiBE):
https://gcc.gnu.org/pipermail/gcc-patches/2021-June/573233.html
Investigating further, the cause turns out to be that x86_64's
scalar-to-vector (stv) pass is relying on poor estimates of the size
costs/benefits. This patch tweaks the backend's compute_convert_gain
method to provide slightly more accurate values when compiling with
-Os. Compilation without -Os is (should be) unaffected. And for
completeness, I'll mention that the stv pass is a net win for code
size so it's much better to improve its heuristics than simply gate
the pass on !optimize_for_size.
The net effect of this change is to save 1399 bytes on the CSiBE
code size benchmark when compiling with -Os.
2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
Richard Biener <rguenther@suse.de>
gcc/ChangeLog
* config/i386/i386-features.c (compute_convert_gain): Provide
more accurate values for CONST_INT, when optimizing for size.
* config/i386/i386.c (COSTS_N_BYTES): Move definition from here...
* config/i386/i386.h (COSTS_N_BYTES): to here.
Roger Sayle [Tue, 24 Aug 2021 01:59:02 +0000 (02:59 +0100)]
[Committed] PR middle-end/102029: Stricter typing in LSHIFT_EXPR sign folding.
My sincere apologies to everyone (again). As diagnosed by
Jakub Jelinek, my recent patch to fold the signedness of LSHIFT_EXPR
needs to be careful not to attempt transforming a left shift in an
integer type into an invalid left shift of a pointer type.
2021-08-24 Roger Sayle <roger@nextmovesoftware.com>
Jakub Jelinek <jakub@redhat.com>
gcc/ChangeLog
PR middle-end/102029
* match.pd (shift transformations): Add an additional check for
!POINTER_TYPE_P in the recently added left shift transformation.
gcc/testsuite/ChangeLog
PR middle-end/102029
* gcc.dg/fold-convlshift-3.c: New test case.
David Malcolm [Mon, 23 Aug 2021 23:27:21 +0000 (19:27 -0400)]
analyzer: rewrite of switch handling
When investigating false positives on the Linux kernel from
-Wanalyzer-use-of-uninitialized-value, I noticed that the existing
implementation of switch statements in the analyzer is broken.
Specifically, the existing implementation assumes a 1:1 association
between CFG out-edges from the basic block and case labels in the
gimple switch statement. This happened to be the case in the
examples I had tested, but there is no such association in general.
In particular, in the motivating example:
arch/x86/kernel/cpu/mtrr/if.c: mtrr_ioctl
the switch statement has 3 blocks, each covering multiple ranges of
ioctl command IDs for which different local variables are initialized,
which the existing implementation gets badly wrong. [1]
This patch reimplements switch handling in the analyzer to eliminate
this false assumption - instead, for each out-edge we gather the set
of case labels for that out-edge, and use that to determine the
set of value ranges for the edge. Avoiding false positives for the
above example requires that we accurately track value ranges for
symbolic values, so the patch extends constraint_manager with a new
bounded_ranges_constraint, adding just enough information to capture the
ranges for switch statements whilst retaining combatility with the
existing constraint-handling (ultimately I'd prefer to simply throw
all of this into a SAT solver and let it track things).
Doing so fixes the false positives seen on the Linux kernel and an
existing xfail in the test suite.
The patch also fixes a long-standing bug in
constraint_manager::add_unknown_constraint when updating constraints
due to combining equivalence classes, spotted when debugging the
same logic for the new kind of constraints.
[1] a reduced version of this code is captured in this patch, in
gcc.dg/analyzer/torture/switch-3.c
gcc/analyzer/ChangeLog:
* analyzer.h (struct rejected_constraint): Convert to...
(class rejected_constraint): ...this.
(class bounded_ranges): New forward decl.
(class bounded_ranges_manager): New forward decl.
* constraint-manager.cc: Include "analyzer/analyzer-logging.h" and
"tree-pretty-print.h".
(can_plus_one_p): New.
(plus_one): New.
(can_minus_one_p): New.
(minus_one): New.
(bounded_range::bounded_range): New.
(dump_cst): New.
(bounded_range::dump_to_pp): New.
(bounded_range::dump): New.
(bounded_range::to_json): New.
(bounded_range::set_json_attr): New.
(bounded_range::contains_p): New.
(bounded_range::intersects_p): New.
(bounded_range::operator==): New.
(bounded_range::cmp): New.
(bounded_ranges::bounded_ranges): New.
(bounded_ranges::bounded_ranges): New.
(bounded_ranges::bounded_ranges): New.
(bounded_ranges::canonicalize): New.
(bounded_ranges::validate): New.
(bounded_ranges::operator==): New.
(bounded_ranges::dump_to_pp): New.
(bounded_ranges::dump): New.
(bounded_ranges::to_json): New.
(bounded_ranges::eval_condition): New.
(bounded_ranges::contain_p): New.
(bounded_ranges::cmp): New.
(bounded_ranges_manager::~bounded_ranges_manager): New.
(bounded_ranges_manager::get_or_create_empty): New.
(bounded_ranges_manager::get_or_create_point): New.
(bounded_ranges_manager::get_or_create_range): New.
(bounded_ranges_manager::get_or_create_union): New.
(bounded_ranges_manager::get_or_create_intersection): New.
(bounded_ranges_manager::get_or_create_inverse): New.
(bounded_ranges_manager::consolidate): New.
(bounded_ranges_manager::get_or_create_ranges_for_switch): New.
(bounded_ranges_manager::create_ranges_for_switch): New.
(bounded_ranges_manager::make_case_label_ranges): New.
(bounded_ranges_manager::log_stats): New.
(bounded_ranges_constraint::print): New.
(bounded_ranges_constraint::to_json): New.
(bounded_ranges_constraint::operator==): New.
(bounded_ranges_constraint::add_to_hash): New.
(constraint_manager::constraint_manager): Update for new field
m_bounded_ranges_constraints.
(constraint_manager::operator=): Likewise.
(constraint_manager::hash): Likewise.
(constraint_manager::operator==): Likewise.
(constraint_manager::print): Likewise.
(constraint_manager::dump_to_pp): Likewise.
(constraint_manager::to_json): Likewise.
(constraint_manager::add_unknown_constraint): Update the lhs_ec_id
if necessary in existing constraints when combining equivalence
classes. Add similar code for handling
m_bounded_ranges_constraints.
(constraint_manager::add_constraint_internal): Add comment.
(constraint_manager::add_bounded_ranges): New.
(constraint_manager::eval_condition): Use new field
m_bounded_ranges_constraints.
(constraint_manager::purge): Update bounded_ranges_constraint
instances.
(constraint_manager::canonicalize): Update for new field.
(merger_fact_visitor::on_ranges): New.
(constraint_manager::for_each_fact): Use new field
m_bounded_ranges_constraints.
(constraint_manager::validate): Fix off-by-one error needed due
to bug fixed above in add_unknown_constraint. Validate the EC IDs
in m_bounded_ranges_constraints.
(constraint_manager::get_range_manager): New.
(selftest::assert_dump_bounded_range_eq): New.
(ASSERT_DUMP_BOUNDED_RANGE_EQ): New.
(selftest::test_bounded_range): New.
(selftest::assert_dump_bounded_ranges_eq): New.
(ASSERT_DUMP_BOUNDED_RANGES_EQ): New.
(selftest::test_bounded_ranges): New.
(selftest::run_constraint_manager_tests): Call the new selftests.
* constraint-manager.h (struct bounded_range): New.
(struct bounded_ranges): New.
(template <> struct default_hash_traits<bounded_ranges::key_t>): New.
(class bounded_ranges_manager): New.
(fact_visitor::on_ranges): New pure virtual function.
(class bounded_ranges_constraint): New.
(constraint_manager::add_bounded_ranges): New decl.
(constraint_manager::get_range_manager): New decl.
(constraint_manager::m_bounded_ranges_constraints): New field.
* diagnostic-manager.cc (epath_finder::process_worklist_item):
Transfer ownership of rc to add_feasibility_problem.
* engine.cc (feasibility_problem::dump_to_pp): Use get_model.
* feasible-graph.cc (infeasible_node::dump_dot): Update for
conversion of m_rc to a pointer.
(feasible_graph::add_feasibility_problem): Pass RC by pointer and
take ownership.
* feasible-graph.h (infeasible_node::infeasible_node): Pass RC by
pointer and take ownership.
(infeasible_node::~infeasible_node): New.
(infeasible_node::m_rc): Convert to a pointer.
(feasible_graph::add_feasibility_problem): Pass RC by pointer and
take ownership.
* region-model-manager.cc: Include
"analyzer/constraint-manager.h".
(region_model_manager::region_model_manager): Initializer new
field m_range_mgr.
(region_model_manager::~region_model_manager): Delete it.
(region_model_manager::log_stats): Call log_stats on it.
* region-model.cc (region_model::add_constraint): Use new subclass
rejected_op_constraint.
(region_model::apply_constraints_for_gswitch): Reimplement using
bounded_ranges_manager.
(rejected_constraint::dump_to_pp): Convert to...
(rejected_op_constraint::dump_to_pp): ...this.
(rejected_ranges_constraint::dump_to_pp): New.
* region-model.h (struct purge_stats): Add field
m_num_bounded_ranges_constraints.
(region_model_manager::get_range_manager): New.
(region_model_manager::m_range_mgr): New.
(region_model::get_range_manager): New.
(struct rejected_constraint): Split into...
(class rejected_constraint):...this new abstract base class,
and...
(class rejected_op_constraint): ...this new concrete subclass.
(class rejected_ranges_constraint): New.
* supergraph.cc: Include "tree-cfg.h".
(supergraph::supergraph): Drop idx param from add_cfg_edge.
(supergraph::add_cfg_edge): Drop idx param.
(switch_cfg_superedge::switch_cfg_superedge): Move here from
header. Populate m_case_labels with all cases which go to DST.
(switch_cfg_superedge::dump_label_to_pp): Reimplement to use
m_case_labels.
(switch_cfg_superedge::get_case_label): Delete.
* supergraph.h (supergraphadd_cfg_edge): Drop "idx" param.
(switch_cfg_superedge::switch_cfg_superedge): Drop idx param and
move implementation to supergraph.cc.
(switch_cfg_superedge::get_case_label): Delete.
(switch_cfg_superedge::get_case_labels): New.
(switch_cfg_superedge::m_idx): Delete.
(switch_cfg_superedge::m_case_labels): New field.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/switch.c: Remove xfail. Add various tests.
* gcc.dg/analyzer/torture/switch-2.c: New test.
* gcc.dg/analyzer/torture/switch-3.c: New test.
* gcc.dg/analyzer/torture/switch-4.c: New test.
* gcc.dg/analyzer/torture/switch-5.c: New test.
David Malcolm [Mon, 23 Aug 2021 18:09:44 +0000 (14:09 -0400)]
analyzer: fix ICE when failing to reconstruct a fn ptr [PR101837]
gcc/analyzer/ChangeLog:
PR analyzer/101837
* analyzer.cc (maybe_reconstruct_from_def_stmt): Bail if fn is
NULL, and assert that it's non-NULL before passing it to
build_call_array_loc.
gcc/testsuite/ChangeLog:
PR analyzer/101837
* gcc.dg/analyzer/pr101837.c: New test.
David Malcolm [Mon, 23 Aug 2021 18:07:39 +0000 (14:07 -0400)]
analyzer: assume that POINTER_PLUS_EXPR of non-NULL is non-NULL [PR101962]
gcc/analyzer/ChangeLog:
PR analyzer/101962
* region-model.cc (region_model::eval_condition_without_cm):
Refactor comparison against zero, adding a check for
POINTER_PLUS_EXPR of non-NULL.
gcc/testsuite/ChangeLog:
PR analyzer/101962
* gcc.dg/analyzer/data-model-23.c: New test.
* gcc.dg/analyzer/pr101962.c: New test.
David Malcolm [Mon, 23 Aug 2021 18:01:01 +0000 (14:01 -0400)]
analyzer: fix uninit false positive on overlapping bindings
gcc/analyzer/ChangeLog:
* store.cc (bit_range::intersects_p): New overload.
(bit_range::operator-): New.
(binding_cluster::maybe_get_compound_binding): Handle the partial
overlap case.
(selftest::test_bit_range_intersects_p): Add test coverage for
new overload of bit_range::intersects_p.
* store.h (bit_range::intersects_p): New overload.
(bit_range::operator-): New.
gcc/testsuite/ChangeLog:
* gcc.dg/analyzer/data-model-22.c: New test.
* gcc.dg/analyzer/uninit-6.c: New test.
* gcc.dg/analyzer/uninit-6b.c: New test.
Jan Hubicka [Mon, 23 Aug 2021 15:56:51 +0000 (17:56 +0200)]
Avoid redundant entries in modref access lists.
In PR101296 Richard noticed that modref is giving up on analysis in milc by
hitting --param=modref-max-accesses limit. While cleaning up original modref
patch I removed code that tried to do smart things while merging accesses
because it had bugs and wanted to reimplement it later which I later forgot.
This patch adds logic that avoids adding access and its subaccess to the list
which is just waste of memory and compile time. Incrementally I will add logic
merging the ranges.
gcc/ChangeLog:
2021-08-23 Jan Hubicka <hubicka@ucw.cz>
* ipa-modref-tree.h (modref_access_node::range_info_useful_p):
Improve range compare.
(modref_access_node::contains): New member function.
(modref_access_node::search): Remove.
(modref_access_node::insert): Be smarter about subaccesses.
Thomas Schwinge [Mon, 2 Aug 2021 15:38:05 +0000 (17:38 +0200)]
Allow matching Intel MIC in OpenMP 'declare variant'
..., and use that to improve XFAILing for Intel MIC offloading execution
instead of compilation in 'libgomp.c-c++-common/target-45.c',
'libgomp.fortran/target10.f90'.
gcc/
* config/i386/i386-options.c (ix86_omp_device_kind_arch_isa)
<omp_device_arch> [ACCEL_COMPILER]: Match "intel_mic".
* config/i386/t-omp-device (omp-device-properties-i386) <arch>:
Add "intel_mic".
libgomp/
* testsuite/lib/libgomp.exp
(check_effective_target_offload_target_intelmic): Remove 'proc'.
(check_effective_target_offload_device_intel_mic): New 'proc'.
* testsuite/libgomp.c-c++-common/on_device_arch.h
(device_arch_intel_mic, on_device_arch_intel_mic): New.
* testsuite/libgomp.c-c++-common/target-45.c: Use that for
'dg-xfail-run-if'.
* testsuite/libgomp.fortran/target10.f90: Likewise.
Roger Sayle [Mon, 23 Aug 2021 14:35:05 +0000 (15:35 +0100)]
[Committed] Restore build on !TARGET_TRULY_NOOP_TRUNCATION targets
My sincere apologies to everyone, but especially Andrew Pinski
who warned me in advance that TRULY_NOOP_TRUNCATION results in
different code paths/optimizations on some targets. This restores
the build on nvptx-none (and presumably others) where mysteriously
(truncate:QI (reg:QI)) fails to be simplified to (reg:QI), which
is expected (everywhere) in my recently added self-tests.
2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* simplify-rtx.c (simplify_unary_operation_1): [TRUNCATE]:
Handle case where the operand is already the desired mode.
Jonathan Wakely [Mon, 23 Aug 2021 12:12:24 +0000 (13:12 +0100)]
libstdc++: Use __builtin_expect in __dynamic_cast
The null pointer check is never needed for correct code, only to
gracefully handle undefined cases. Add __builtin_expect to be sure that
we don't pessimize the valid uses.
libstdc++-v3/ChangeLog:
* libsupc++/dyncast.cc (__dynamic_cast): Add __builtin_expect to
precondition check.
* dump-parse-tree.c (show_omp_clauses): Handle 'strict' modifier
on grainsize/num_tasks
* gfortran.h (gfc_omp_clauses): Add grainsize_strict
and num_tasks_strict.
* trans-openmp.c (gfc_trans_omp_clauses, gfc_split_omp_clauses):
Handle 'strict' modifier on grainsize/num_tasks.
* openmp.c (gfc_match_omp_clauses): Likewise.
libgomp/ChangeLog:
* testsuite/libgomp.fortran/taskloop-4-a.f90: New test.
* testsuite/libgomp.fortran/taskloop-4.f90: New test.
* testsuite/libgomp.fortran/taskloop-5-a.f90: New test.
* testsuite/libgomp.fortran/taskloop-5.f90: New test.
Richard Biener [Mon, 23 Aug 2021 11:37:41 +0000 (13:37 +0200)]
Fix scalar costing issue introduced by PR84512 fix.
This fixes double-scaling of the inner loop scalar cost caused
by routing the scalar costs through the add_stmt_cost hook and
using vect_body as the location. The issue makes almost every
outer loop vectorization profitable.
2021-08-23 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vect_compute_single_scalar_iteration_cost):
Properly scale the inner loop cost only once.
Roger Sayle [Mon, 23 Aug 2021 11:44:37 +0000 (12:44 +0100)]
Improved handling of division/modulus in bit CCP.
This patch implements support for TRUNC_MOD_EXPR and TRUNC_DIV_EXPR
in tree-ssa's bit CCP pass. This is mostly for completeness, as the
VRP pass already provides better bounds for these operations, but
seeing mask values of all_ones in my debugging/instrumentation logs
seemed overly pessimistic. With this patch, the expression X%10
has a nonzero bits of 0x0f (for unsigned X), likewise (X&1)/3 has
a known value of zero, and (X&3)/3 has a nonzero bits mask of 0x1.
2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* tree-ssa-ccp.c (bit_value_binop) [TRUNC_MOD_EXPR, TRUNC_DIV_EXPR]:
Provide bounds for unsigned (and signed with non-negative operands)
division and modulus.
Roger Sayle [Mon, 23 Aug 2021 11:40:10 +0000 (12:40 +0100)]
Simplify (truncate:QI (subreg:SI (reg:QI x))) to (reg:QI x)
Whilst working on a backend patch, I noticed that the middle-end's
RTL optimizers weren't simplifying a truncation of a paradoxical
subreg extension, though it does transform closely related (more
complex) expressions. The main (first) part of this patch
implements this simplification, reusing much of the logic already
in place.
I briefly considered suggesting that it's difficult to provide a new
testcase for this change, but then realized the reviewer's response
would be that this type of transformation should be self-tested
in simplify-rtx, so this patch adds a bunch of tests that integer
extensions and truncations are simplified as expected. No good
deed goes unpunished and I was equally surprised to see that we
don't currently simplify/check/defend (zero_extend:SI (reg:SI)),
i.e. useless no-op extensions to the same mode. So I've added
some logic to simplify (or more accurately prevent us generating
dubious RTL for) those.
2021-08-23 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* simplify-rtx.c (simplify_truncation): Generalize simplification
of (truncate:A (subreg:B X)).
(simplify_unary_operation_1) [FLOAT_TRUNCATE, FLOAT_EXTEND,
SIGN_EXTEND, ZERO_EXTEND]: Handle cases where the operand
already has the desired machine mode.
(test_scalar_int_ops): Add tests that useless extensions and
truncations are optimized away.
(test_scalar_int_ext_ops): New self-test function to confirm
that truncations of extensions are correctly simplified.
(test_scalar_int_ext_ops2): New self-test function to check
truncations of truncations, extensions of extensions, and
truncations of extensions.
(test_scalar_ops): Call the above two functions with a
representative sampling of integer machine modes.
which generates exactly the same assembly language. Aside from the
reduced memory usage, the real benefit is that no-op conversions tend
to interfere with many folding optimizations. For example,
unsigned int bar(unsigned char i) {
return (i ^ (i<<16)) | (i<<8);
}
currently gets (tangled in conversions and) optimized to:
unsigned int bar (unsigned char i)
{
unsigned int _1;
unsigned int _2;
int _3;
int _4;
unsigned int _6;
unsigned int _8;
The following patch recognizes in the bswap pass (only there for now,
haven't done it for store merging pass yet) code sequences that can
be handled by (int32) __builtin_bswap64 (arg), i.e. where we have
0x05060708 n->n with 64-bit non-memory argument (if it is memory, we
can just load the 32-bit at 4 bytes into the address and n->n would
be 0x01020304; and only 64 -> 32 bit, because 64 -> 16 bit or 32 -> 16 bit
would mean only two bytes in the result and probably not worth it),
and furthermore the case where we have in the 0x0102030405060708 etc.
numbers some bytes 0 (i.e. known to contain zeros rather than source bytes),
as long as we have at least two original bytes in the right
positions (and no unknown bytes). This can be handled by
__builtin_bswap64 (arg) & 0xff0000ffffff00ffULL etc.
The latter change is the reason why counting the bswap messages doesn't work
too well in optimize-bswap* tests anymore, while the pass iterates from end
of basic block towards start, it will often match both the bswap at the end
and some of the earlier bswaps with some masks (not a problem generally,
we'll just DCE it away whenever possible). The pass right now doesn't
handle __builtin_bswap* calls in the pattern matching (which is the reason
why it operates backwards), but it uses FOR_EACH_BB_FN (bb, fun) order
of handling blocks and matched sequences can span multiple blocks, so I was
worried about cases like:
void bar (unsigned long long);
unsigned long long
foo (unsigned long long value, int x)
{
unsigned long long tmp = (((value & 0x00000000000000ffull) << 56)
| ((value & 0x000000000000ff00ull) << 40)
| ((value & 0x00000000ff000000ull) << 8));
if (x)
bar (tmp);
return (tmp
| ((value & 0x000000ff00000000ull) >> 8)
| ((value & 0x0000ff0000000000ull) >> 24)
| ((value & 0x0000000000ff0000ull) << 24)
| ((value & 0x00ff000000000000ull) >> 40)
| ((value & 0xff00000000000000ull) >> 56));
}
but it seems we handle even that fine, while bb2 ending in GIMPLE_COND
is processed first, we recognize there a __builtin_bswap64 (value) & mask1,
in the last bb we recognize tmp | (__builtin_bswap64 (value) & mask2) and
PRE optimizes that into t = __builtin_bswap64 (value); tmp = t & mask1;
in the first bb and return t; in the last one.
2021-08-23 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/86723
* gimple-ssa-store-merging.c (find_bswap_or_nop_finalize): Add
cast64_to_32 argument, set *cast64_to_32 to false, unless n is
non-memory permutation of 64-bit src which only has bytes of
0 or [5..8] and n->range is 4.
(find_bswap_or_nop): Add cast64_to_32 and mask arguments, adjust
find_bswap_or_nop_finalize caller, support bswap with some bytes
zeroed, as long as at least two bytes are not zeroed.
(bswap_replace): Add mask argument and handle masking of bswap
result.
(maybe_optimize_vector_constructor): Adjust find_bswap_or_nop
caller, punt if cast64_to_32 or mask is not all ones.
(pass_optimize_bswap::execute): Adjust find_bswap_or_nop_finalize
caller, for now punt if cast64_to_32.
* gcc.dg/pr86723.c: New test.
* gcc.target/i386/pr86723.c: New test.
* gcc.dg/optimize-bswapdi-1.c: Use -fdump-tree-optimized instead of
-fdump-tree-bswap and scan for number of __builtin_bswap64 calls.
* gcc.dg/optimize-bswapdi-2.c: Likewise.
* gcc.dg/optimize-bswapsi-1.c: Use -fdump-tree-optimized instead of
-fdump-tree-bswap and scan for number of __builtin_bswap32 calls.
* gcc.dg/optimize-bswapsi-5.c: Likewise.
* gcc.dg/optimize-bswapsi-3.c: Likewise. Expect one __builtin_bswap32
call instead of zero.
Richard Biener [Mon, 23 Aug 2021 07:57:05 +0000 (09:57 +0200)]
tree-optimization/79334 - avoid PRE of possibly trapping array-ref
This replicates tree-eh.c in_array_bound_p into VNs
vn_reference_may_trap to fix hoisting of a possibly trapping
ARRAY_REF across a call that might not return.
2021-08-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/79334
* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Record
a type also for COMPONENT_REFs.
(vn_reference_may_trap): Check ARRAY_REF with constant index
against the array domain.
* gcc.dg/torture/pr79334-0.c: New testcase.
* gcc.dg/torture/pr79334-1.c: Likewise.
Jakub Jelinek [Mon, 23 Aug 2021 09:50:14 +0000 (11:50 +0200)]
dwarf2out: Emit DW_AT_location for global register vars during early dwarf [PR101905]
The following patch emits DW_AT_location for global register variables
already during early dwarf, since usually late_global_decl hook isn't even
called for those, as nothing needs to be emitted for them.
2021-08-23 Jakub Jelinek <jakub@redhat.com>
PR debug/101905
* dwarf2out.c (gen_variable_die): Add DW_AT_location for global
register variables already during early_dwarf if possible.
arm: Fix multilib mapping for CDE extensions [PR100856]
This is a followup to Srinath's recent patch: the newly added test is
failing e.g. on arm-linux-gnueabihf without R/M profile multilibs.
It is also failing on arm-eabi with R/M profile multilibs if the
execution engine does not support v8.1-M instructions.
The patch avoids this by adding check_effective_target_FUNC_multilib
in target-supports.exp which effectively checks whether the target
supports linking and execution, like what is already done for other
ARM effective targets. pr100856.c is updated to use it instead of
arm_v8_1m_main_cde_mve_ok (which makes the testcase a bit of a
duplicate with check_effective_target_FUNC_multilib).
In addition, I noticed that requiring MVE does not seem necessary and
this enables the test to pass even when targeting a CPU without MVE:
since the test does not involve actual CDE instructions, it can pass
on other architecture versions. For instance, when requiring MVE, we
have to use cortex-m55 under QEMU for the test to pass because the
memset() that comes from v8.1-m.main+mve multilib uses LOB
instructions (DLS) (memset is used during startup). Keeping
arm_v8_1m_main_cde_mve_ok would mean we would enable the test provided
we have the right multilibs, causing a runtime error if the simulator
does not support LOB instructions (e.g. when targeting cortex-m7).
I do not update sourcebuild.texi since the CDE effective targets are
already collectively documented.
gcc/testsuite/
* gcc.target/arm/acle/pr100856.c: Use arm_v8m_main_cde_multilib
and arm_v8m_main_cde.
* lib/target-supports.exp: Add
check_effective_target_FUNC_multilib for ARM CDE.
Jakub Jelinek [Mon, 23 Aug 2021 08:16:24 +0000 (10:16 +0200)]
openmp: Add support for strict modifier on grainsize/num_tasks clauses
With strict: modifier on these clauses, the standard is explicit about
how many iterations (and which) each generated task of taskloop directive
should contain. For num_tasks it actually matches what we were already
implementing, but for grainsize it does not (and even violates the old
rule - without strict it requires that the number of iterations (unspecified
which exactly) handled by each generated task is >= grainsize argument and
< 2 * grainsize argument, with strict: it requires that each generated
task handles exactly == grainsize argument iterations, except for the
generated task handling the last iteration which can handles <= grainsize
iterations).
The following patch implements it for C and C++.
2021-08-23 Jakub Jelinek <jakub@redhat.com>
gcc/
* tree.h (OMP_CLAUSE_GRAINSIZE_STRICT): Define.
(OMP_CLAUSE_NUM_TASKS_STRICT): Define.
* tree-pretty-print.c (dump_omp_clause) <case OMP_CLAUSE_GRAINSIZE,
case OMP_CLAUSE_NUM_TASKS>: Print strict: modifier.
* omp-expand.c (expand_task_call): Use GOMP_TASK_FLAG_STRICT in iflags
if either grainsize or num_tasks clause has the strict modifier.
gcc/c/
* c-parser.c (c_parser_omp_clause_num_tasks,
c_parser_omp_clause_grainsize): Parse the optional strict: modifier.
gcc/cp/
* parser.c (cp_parser_omp_clause_num_tasks,
cp_parser_omp_clause_grainsize): Parse the optional strict: modifier.
include/
* gomp-constants.h (GOMP_TASK_FLAG_STRICT): Define.
libgomp/
* taskloop.c (GOMP_taskloop): Handle GOMP_TASK_FLAG_STRICT.
* testsuite/libgomp.c-c++-common/taskloop-4.c (main): Fix up comment.
* testsuite/libgomp.c-c++-common/taskloop-5.c: New test.
When -mloongson-mmi is enabled, SHIFT_COUNT_TRUNCATED is turned off.
This causes untruncated immediate shift amount outputed into the asm,
and the GNU assembler refuses to assemble it.
Truncate immediate shift amount when outputing the asm instruction to
make GAS happy again.
gcc/
PR target/101922
* config/mips/mips-protos.h (mips_msa_output_shift_immediate):
Declare.
* config/mips/mips.c (mips_msa_output_shift_immediate): New
function.
* config/mips/mips-msa.md (vashl<mode>3, vashr<mode>3,
vlshr<mode>3): Call it.
gcc/testsuite/
PR target/101922
* gcc.target/mips/pr101922.c: New test.
Jonathan Yong [Sun, 22 Aug 2021 03:05:07 +0000 (03:05 +0000)]
gcc.c-torture/execute: Fix tmpnam issue on Windows
2021-08-22 Jonathan Yong <10walls@gmail.com>
gcc/testsuite/ChangeLog:
* gcc.c-torture/execute/gcc_tmpnam.h: Fix tmpnam case on Windows
where it can return a filename with "\" to indicate current
directory.
* gcc.c-torture/execute/fprintf-2.c: Use wrapper.
* gcc.c-torture/execute/printf-2.c: Use wrapper.
* gcc.c-torture/execute/user-printf.c: Use wrapper.
Martin Uecker [Sun, 22 Aug 2021 21:47:58 +0000 (23:47 +0200)]
Correct treatment of qualifiers for pointers to arrays for C2X [PR98397]
2021-08-22 Martin Uecker <muecker@gwdg.de>
gcc/c/
PR c/98397
* c-typeck.c (comp_target_types): Change pedwarn to pedwarn_c11
for pointers to arrays with qualifiers.
(build_conditional_expr): For C23 don't lose qualifiers for pointers
to arrays when the other pointer is a void pointer. Update warnings.
(convert_for_assignment): Update warnings for C2X when converting from
void* with qualifiers to a pointer to array with the same qualifiers.
gcc/testsuite/
PR c/98397
* gcc.dg/c11-qual-1.c: New test.
* gcc.dg/c2x-qual-1.c: New test.
* gcc.dg/c2x-qual-2.c: New test.
* gcc.dg/c2x-qual-3.c: New test.
* gcc.dg/c2x-qual-4.c: New test.
* gcc.dg/c2x-qual-5.c: New test.
* gcc.dg/c2x-qual-6.c: New test.
* gcc.dg/c2x-qual-7.c: New test.
* gcc.dg/pointer-array-quals-1.c: Remove unnecessary flag.
* gcc.dg/pointer-array-quals-2.c: Remove unnecessary flag.
Thomas Schwinge [Fri, 20 Aug 2021 13:12:56 +0000 (15:12 +0200)]
Make the OpenMP 'error' directive work for nvptx offloading
... and add a minimum amount of offloading testing.
(Leaving aside that 'fwrite' to 'stderr' probably wouldn't work anyway) the
'fwrite' calls in 'libgomp/error.c:GOMP_warning', 'libgomp/error.c:GOMP_error'
drag in 'isatty', which isn't provided by my nvptx newlib build at present, so
we get, for example:
[...]
FAIL: libgomp.c/../libgomp.c-c++-common/declare_target-1.c (test for excess errors)
Excess errors:
unresolved symbol isatty
mkoffload: fatal error: [...]/build-gcc/./gcc/x86_64-pc-linux-gnu-accel-nvptx-none-gcc returned 1 exit status
[...]
Since 'Remove obsolete IRIX 6.5 support' [1] we only use
gp-relative jump-tables for PIC code. We can fall back to
default behaviour for asm_function_rodata_section.
Ankur Saini [Thu, 19 Aug 2021 14:24:56 +0000 (19:54 +0530)]
analyzer: Fix PR analyzer/101980
2021-08-19 Ankur Saini <arsenic@sourceware.org>
gcc/analyzer/ChangeLog:
PR analyzer/101980
* diagnostic-manager.cc
(diagnostic_manager::prune_for_sm_diagnostic)<case EK_CALL_EDGE>: Use
caller_model only when the supergraph_edge doesn't exixt.
(diagnostic_manager::prune_for_sm_diagnostic)<case EK_RETURN_EDGE>:
Likewise.
* engine.cc (exploded_graph::create_dynamic_call): Rename to...
(exploded_graph::maybe_create_dynamic_call): ...this, return call
creation status.
(exploded_graph::process_node): Handle calls which were not dynamically
discovered.
* exploded-graph.h (exploded_graph::create_dynamic_call): Rename to...
(exploded_graph::maybe_create_dynamic_call): ...this.
* region-model.cc (region_model::update_for_gcall): New param, use it
to push call to frame.
(region_model::update_for_call_superedge): Pass callee function to
update_for_gcall.
* region-model.h (region_model::update_for_gcall): New param.
configure: drop version checks for in-tree gas [PR91602]
Special-casing checks for in-tree gas features is unnecessary since
r100007 which made configure-gcc depend on all-gas, and thus making
alternate code path in gcc_GAS_CHECK_FEATURE for in-tree gas
redundant.
Along the way this fixes PR 91602, which is caused by incorrect guess
of leb128 support presence in RISC-V.
First patch removes alternate code path in gcc_GAS_CHECK_FEATURE and
related code, the rest are further cleanups. Patches 2 and 3 in
series make no functional changes, thus configure is unchanged.
gcc/ChangeLog:
PR target/91602
* acinclude.m4 (_gcc_COMPUTE_GAS_VERSION, _gcc_GAS_VERSION_GTE_IFELSE)
(gcc_GAS_VERSION_GTE_IFELSE): Remove.
(gcc_GAS_CHECK_FEATURE): Do not handle in-tree case specially.
* configure.ac: Remove gcc_cv_gas_major_version, gcc_cv_gas_minor_version.
Remove remaining checks for in-tree assembler.
* configure: Regenerate.
Jeff Law [Fri, 20 Aug 2021 15:19:05 +0000 (11:19 -0400)]
Further improvements to constant shifts for the H8
gcc/
* config/h8300/h8300.c (shift_alg_hi): Improve arithmetic shift right
by 15 bits for H8/300H and H8/S. Improve logical shifts by 12
bits for H8/S.
(shift_alg_si): Improve arithmetic right shift by 28-30 bits for
H8/300H. Improve arithmetic shift right by 15 bits for H8/S.
Improve logical shifts by 27 bits for H8/S.
(get_shift_alg): Corresponding changes.
(h8300_option_override): Revert to loops for -Os when profitable.
Jonathan Wakely [Fri, 20 Aug 2021 13:51:06 +0000 (14:51 +0100)]
libstdc++: Skip filesystem tests that depend on permissions [PR90787]
Tests that depend on filesystem permissions FAIL if run on Windows or as
root. Add a helper function to detect those cases, so the tests can skip
those checks gracefully.
Signed-off-by: Jonathan Wakely <jwakely@redhat.com>
libstdc++-v3/ChangeLog:
Tobias Burnus [Fri, 20 Aug 2021 13:43:32 +0000 (15:43 +0200)]
c-format.c/Fortran: Support %wd / host-wide integer in gfc_error
This patch adds support for the 'll' (long double)
and 'w' (HOST_WIDE_INT) length modifiers to the
Fortran FE diagnostic function (gfc_error, gfc_warning, ...)
gcc/c-family/ChangeLog:
* c-format.c (gcc_gfc_length_specs): Add 'll' and 'w'.
(gcc_gfc_char_table): Add T9L_LL and T9L_ULL to
"di" and "u", respecitively; fill with BADLEN to match
size of 'types'.
(get_init_dynamic_hwi): Split off from ...
(init_dynamic_diag_info): ... here. Call it.
(init_dynamic_gfc_info): Call it.
gcc/fortran/ChangeLog:
* error.c
(error_uinteger): Take 'long long unsigned' instead
of 'long unsigned' as argumpent.
(error_integer): Take 'long long' instead of 'long'.
(error_hwuint, error_hwint): New.
(error_print): Update to handle 'll' and 'w'
length modifiers.
* simplify.c (substring_has_constant_len): Use '%wd'
in gfc_error.
Richard Biener [Fri, 20 Aug 2021 09:32:00 +0000 (11:32 +0200)]
Refactor BB splitting of DRs for SLP group analysis
This uses the group_id computed to ensure DRs in different BBs do
not get merged into a DR group. To achieve this we seed the
group from the BB index when group_ids are not computed and we
make sure to bump the group_id when advancing to the next BB for
BB SLP analysis.
This paves the way for relaxing the grouping for BB vectorization
by adjusting its group_id computation.
2021-08-20 Richard Biener <rguenther@suse.de>
* tree-vect-data-refs.c (dr_group_sort_cmp): Do not compare
BBs.
(vect_analyze_data_ref_accesses): Likewise. Assign the BB
index as group_id when dataref_groups were not computed.
* tree-vect-slp.c (vect_slp_bbs): Bump current_group when
we advace to the next BB.
Jakub Jelinek [Fri, 20 Aug 2021 09:36:52 +0000 (11:36 +0200)]
openmp: Implement the error directive
This patch implements the error directive. Depending on clauses it is either
a compile time diagnostics (in that case diagnosed right away) or runtime
diagnostics (libgomp API call that diagnoses at runtime), and either fatal
or warning (error or warning at compile time or fatal error vs. error at
runtime) and either has no message or user supplied message (this kind of
e.g. deprecated attribute). The directive is also stand-alone directive
when at runtime while utility (thus disappears from the IL as if it wasn't
there for parsing like nothing directive) at compile time.
There are some clarifications in the works ATM, so this patch doesn't yet
require that for compile time diagnostics the user message must be a constant
string literal, there are uncertainities on what exactly is valid argument
of message clause (whether just const char * type, convertible to const char *,
qualified/unqualified const char * or char * or what else) and what to do
in templates. Currently even in templates it is diagnosed right away for
compile time diagnostics, if we'll need to substitute it, we'd need to queue
something into the IL, have pt.c handle it and diagnose only later.
2021-08-20 Jakub Jelinek <jakub@redhat.com>
gcc/
* omp-builtins.def (BUILT_IN_GOMP_WARNING, BUILT_IN_GOMP_ERROR): New
builtins.
gcc/c-family/
* c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_ERROR.
* c-pragma.c (omp_pragmas): Add error directive.
* c-omp.c (omp_directives): Uncomment error directive entry.
gcc/c/
* c-parser.c (c_parser_omp_error): New function.
(c_parser_pragma): Handle PRAGMA_OMP_ERROR.
gcc/cp/
* parser.c (cp_parser_handle_statement_omp_attributes): Determine if
PRAGMA_OMP_ERROR directive is C_OMP_DIR_STANDALONE.
(cp_parser_omp_error): New function.
(cp_parser_pragma): Handle PRAGMA_OMP_ERROR.
gcc/fortran/
* types.def (BT_FN_VOID_CONST_PTR_SIZE): New DEF_FUNCTION_TYPE_2.
* f95-lang.c (ATTR_COLD_NORETURN_NOTHROW_LEAF_LIST): Define.
gcc/testsuite/
* c-c++-common/gomp/error-1.c: New test.
* c-c++-common/gomp/error-2.c: New test.
* c-c++-common/gomp/error-3.c: New test.
* g++.dg/gomp/attrs-1.C (bar): Add error directive test.
* g++.dg/gomp/attrs-2.C (bar): Add error directive test.
* g++.dg/gomp/attrs-13.C: New test.
* g++.dg/gomp/error-1.C: New test.
libgomp/
* libgomp.map (GOMP_5.1): Add GOMP_error and GOMP_warning.
* libgomp_g.h (GOMP_warning, GOMP_error): Declare.
* error.c (GOMP_warning, GOMP_error): New functions.
* testsuite/libgomp.c-c++-common/error-1.c: New test.
Jakub Jelinek [Fri, 20 Aug 2021 09:29:48 +0000 (11:29 +0200)]
openmp: Diagnose some superfluous commas in OpenMP parsing
While working on error directive, I've noticed a few spots in OpenMP
parsing where we consume and don't diagnose superfluous commas at the end
(either of depend sink arguments or at the end of requires pragma).
2021-08-20 Jakub Jelinek <jakub@redhat.com>
gcc/c/
* c-parser.c (c_parser_omp_clause_depend_sink): Reject spurious
comma at the end of list.
(c_parser_omp_requires): Likewise.
gcc/cp/
* parser.c (cp_parser_omp_clause_depend_sink): Reject spurious
comma at the end of list. Don't parse closing paren here...
(cp_parser_omp_clause_depend): ... but here instead.
gcc/testsuite/
* c-c++-common/gomp/sink-5.c: New test.
* c-c++-common/gomp/requires-3.c: Add test for spurious comma
at the end of pragma line.
Martin Liska [Tue, 17 Aug 2021 14:24:26 +0000 (16:24 +0200)]
gcov: fix output location for JSON mode.
PR gcov-profile/89961
gcc/ChangeLog:
* gcov.c (make_gcov_file_name): Rewrite using std::string.
(mangle_name): Simplify, do not used the second argument.
(strip_extention): New function.
(get_md5sum): Likewise.
(get_gcov_intermediate_filename): Handle properly -p and -x
options.
(output_gcov_file): Use string type.
(generate_results): Likewise.
(md5sum_to_hex): Remove.
Michael Meissner [Fri, 20 Aug 2021 04:37:49 +0000 (00:37 -0400)]
Move xx* builtins to vsx.md.
I noticed that the xx built-in functions (xxspltiw, xxspltidp, xxsplti32dx,
xxeval, xxblend, and xxpermx) were all defined in altivec.md. However, since
the XX instructions can take both traditional floating point and Altivec
registers, these built-in functions should be in vsx.md.
This patch just moves the insns from altivec.md to vsx.md.
I also moved the VM3 mode iterator and VM3_char mode attribute from altivec.md
to vsx.md, since the only use of these were for the XXBLEND insns.
2021-08-20 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md.
(UNSPEC_XXSPLTIW): Move to vsx.md.
(UNSPEC_XXSPLTID): Move to vsx.md.
(UNSPEC_XXSPLTI32DX): Move to vsx.md.
(UNSPEC_XXBLEND): Move to vsx.md.
(UNSPEC_XXPERMX): Move to vsx.md.
(VM3): Move to vsx.md.
(VM3_char): Move to vsx.md.
(xxspltiw_v4si): Move to vsx.md.
(xxspltiw_v4sf): Move to vsx.md.
(xxspltiw_v4sf_inst): Move to vsx.md.
(xxspltidp_v2df): Move to vsx.md.
(xxspltidp_v2df_inst): Move to vsx.md.
(xxsplti32dx_v4si_inst): Move to vsx.md.
(xxsplti32dx_v4sf): Move to vsx.md.
(xxsplti32dx_v4sf_inst): Move to vsx.md.
(xxblend_<mode>): Move to vsx.md.
(xxpermx): Move to vsx.md.
(xxpermx_inst): Move to vsx.md.
* config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
(UNSPEC_XXSPLTIW): Move from altivec.md.
(UNSPEC_XXSPLTID): Move from altivec.md.
(UNSPEC_XXSPLTI32DX): Move from altivec.md.
(UNSPEC_XXBLEND): Move from altivec.md.
(UNSPEC_XXPERMX): Move from altivec.md.
(VM3): Move from altivec.md.
(VM3_char): Move from altivec.md.
(xxspltiw_v4si): Move from altivec.md.
(xxspltiw_v4sf): Move from altivec.md.
(xxspltiw_v4sf_inst): Move from altivec.md.
(xxspltidp_v2df): Move from altivec.md.
(xxspltidp_v2df_inst): Move from altivec.md.
(xxsplti32dx_v4si_inst): Move from altivec.md.
(xxsplti32dx_v4sf): Move from altivec.md.
(xxsplti32dx_v4sf_inst): Move from altivec.md.
(xxblend_<mode>): Move from altivec.md.
(xxpermx): Move from altivec.md.
(xxpermx_inst): Move from altivec.md.
Roger Sayle [Thu, 19 Aug 2021 23:24:23 +0000 (00:24 +0100)]
Fold more constants during veclower pass.
An issue with a backend patch I've been investigating has revealed
a missed optimization opportunity during GCC's vector lowering pass.
An unrecognized insn for "(set (reg:SI) (not:SI (const_int 0))"
revealed that not only was my expander not expecting a NOT with
a constant operand, but also that veclower was producing the
dubious tree expression ~0.
The attached patch replaces a call to gimple_build_assign with a
call to either gimplify_build1 or gimplify_build2 depending upon
whether the operation takes one or two operands. The net effect
is that where GCC previously produced the following optimized
gimple for testsuite/c-c++common/Wunused-var-16.c (notice the ~0
and the "& 0"):
void foo ()
{
V x;
V y;
vector(16) unsigned char _1;
unsigned char _7;
unsigned char _8;
2021-08-20 Roger Sayle <roger@nextmovesoftware.com>
gcc/ChangeLog
* tree-vect-generic.c (expand_vector_operations_1): Use either
gimplify_build1 or gimplify_build2 instead of gimple_build_assign
when constructing scalar splat expressions.
gcc/testsuite/ChangeLog
* c-c++-common/Wunused-var-16.c: Add an extra check that ~0
is optimized away.
Peter Bergner [Thu, 19 Aug 2021 22:33:29 +0000 (17:33 -0500)]
rs6000: Fix ICE expanding lxvp and stxvp gimple built-ins [PR101849]
PR101849 shows we ICE on a test case when we pass a non __vector_pair *
pointer to the __builtin_vsx_lxvp and __builtin_vsx_stxvp built-ins
that is cast to __vector_pair *. The problem is that when we expand
the built-in, the cast has already been removed from gimple and we are
only given the base pointer. The solution used here (which fixes the ICE)
is to catch this case and convert the pointer to a __vector_pair * pointer
when expanding the built-in.
projects / thirdparty / gcc.git / log
