Konrad Dybcio [Fri, 15 Dec 2023 00:01:08 +0000 (01:01 +0100)]
arm64: dts: qcom: sm6375: Hook up MPM
Add a node for MPM and wire it up on consumers that use it. This also
fixes a very bad and sad assumption I made when initially porting this
SoC that the downstream MPM-TLMM mappings were 1-1. That apparently
changed some time ago, so with this patch the MPM consumers will actually
be hooked up to the correct interrupt lines.
Abel Vesa [Thu, 14 Dec 2023 19:24:50 +0000 (21:24 +0200)]
arm64: dts: qcom: x1e80100-crd: Fix supplies for some LDOs in PM8550
The LDOs 1, 4 and 10 from PM8550 share the same supply, the SMPS 4
from PM8550ve. This needs to be done through shared supply approach
otherwise the bindings check fails.
Douglas Anderson [Thu, 14 Dec 2023 00:35:02 +0000 (16:35 -0800)]
arm64: dts: qcom: sc7180: Switch pompom to the generic edp-panel
Pompom has several sources for its panel. Let's switch it to the
generic edp-panel compatible string to account for this.
This fixes a problem where the panel wouldn't come up on some pompon
devices after commit fb3f43d50d9b ("drm/panel-edp: Avoid adding
multiple preferred modes"). Specifically, some models of pompom have a
1920x1080 panel which is _very_ different than the 1366x768 panel
specified in the dts. Before the recent panel-edp fix on Linux things
kinda/sorta worked because the panel-edp driver would include both the
hardcoded and probed mode, AKA:
...and, at least on ChromeOS, the userspace was consistently picking
the first mode even though both were marked as "preferred". Now that
the Linux driver is fixed we only get the hardcoded mode. That means
we end up trying to drive a 1920x1080 panel at 1366x768 and it doesn't
work so well.
Let's switch over to the generic panel-edp.
Fixes: fb3f43d50d9b ("drm/panel-edp: Avoid adding multiple preferred modes") Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231213163501.1.I8c20f926d15c9ddc12e423e07df1e89db1105d93@changeid Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Johan Hovold [Wed, 13 Dec 2023 17:34:02 +0000 (18:34 +0100)]
arm64: dts: qcom: sm8150: fix USB DP/DM HS PHY interrupts
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states and to be able to detect disconnect events, which requires
triggering on falling edges.
A recent commit updated the trigger type but failed to change the
interrupt provider as required. This leads to the current Linux driver
failing to probe instead of printing an error during suspend and USB
wakeup not working as intended.
Fixes: 54524b6987d1 ("arm64: dts: qcom: sm8150: fix USB wakeup interrupt types") Fixes: 0c9dde0d2015 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes") Fixes: b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") Cc: stable@vger.kernel.org # 5.10 Cc: Jack Pham <quic_jackp@quicinc.com> Cc: Jonathan Marek <jonathan@marek.ca> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231213173403.29544-5-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Johan Hovold [Wed, 13 Dec 2023 17:34:00 +0000 (18:34 +0100)]
arm64: dts: qcom: sdm845: fix USB DP/DM HS PHY interrupts
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states and to be able to detect disconnect events, which requires
triggering on falling edges.
A recent commit updated the trigger type but failed to change the
interrupt provider as required. This leads to the current Linux driver
failing to probe instead of printing an error during suspend and USB
wakeup not working as intended.
Johan Hovold [Wed, 13 Dec 2023 17:33:59 +0000 (18:33 +0100)]
arm64: dts: qcom: sc8180x: fix USB DP/DM HS PHY interrupts
The USB DP/DM HS PHY interrupts need to be provided by the PDC interrupt
controller in order to be able to wake the system up from low-power
states and to be able to detect disconnect events, which requires
triggering on falling edges.
A recent commit updated the trigger type but failed to change the
interrupt provider as required. This leads to the current Linux driver
failing to probe instead of printing an error during suspend and USB
wakeup not working as intended.
Fixes: 0dc0f6da3d43 ("arm64: dts: qcom: sc8180x: fix USB wakeup interrupt types") Fixes: b080f53a8f44 ("arm64: dts: qcom: sc8180x: Add remoteprocs, wifi and usb nodes") Cc: stable@vger.kernel.org # 6.5 Cc: Vinod Koul <vkoul@kernel.org> Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231213173403.29544-2-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
arm64: dts: qcom: sm8550: move Soundwire pinctrl to its nodes
Pin configuration for Soundwire bus should be set in Soundwire
controller nodes, not in the associated macro codec node. This
placement change should not have big impact in general, because macro
codec is a clock provider for Soundwire controller, thus its devices is
probed first. However it will have impact for disabled Soundwire buses,
e.g. WSA2, because after this change the pins will be left in default
state.
We also follow similar approach in newer SoCs, like Qualcomm SM8650.
arm64: dts: qcom: sm8450: move Soundwire pinctrl to its nodes
Pin configuration for Soundwire bus should be set in Soundwire
controller nodes, not in the associated macro codec node. This
placement change should not have big impact in general, because macro
codec is a clock provider for Soundwire controller, thus its devices is
probed first. However it will have impact for disabled Soundwire buses,
e.g. WSA2, because after this change the pins will be left in default
state.
We also follow similar approach in newer SoCs, like Qualcomm SM8650.
arm64: dts: qcom: sm8550: add missing two RX Soundwire ports in configuration
The Qualcomm SM8550 RX Soundwire port configuration was taken from
downstream sources ("rx_frame_params_default"), but without two ports.
Correct the DTS, even though no practical impact was observed.
arm64: dts: qcom: sm8650: drop unneeded assigned-clocks from WSA macro
Review of v1 patch resulting in commit 58872a54e4a8 ("arm64: dts: qcom:
sm8650: add ADSP audio codec macros") pointed to remove unneeded
assigned-clock-rates from macro codecs. One assignment was left in WSA
macro codec, so drop it now as it is redundant: these clocks have fixed
19.2 MHz frequency.
Luca Weiss [Mon, 11 Dec 2023 19:28:07 +0000 (20:28 +0100)]
dt-bindings: arm: qcom: Fix up htc-memul compatible
While applying the original patch, some things got messed up and it
didn't apply to the correct section. Move the compatible to the correct
location to fix that.
Fixes: bfccc195192e ("dt-bindings: arm: qcom: Add HTC One Mini 2") Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231211-htc-memul-fixup-v1-1-c0aeab5aaf44@z3ntu.xyz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Mao Jinlong [Sun, 10 Dec 2023 07:26:31 +0000 (23:26 -0800)]
arm64: dts: qcom: Fix coresight warnings in in-ports and out-ports
When a node is only one in port or one out port, address-cells and
size-cells are not required in in-ports and out-ports. And the number
and reg of the port need to be removed.
arm64: dts: qcom: qrb5165-rb5: add the Bluetooth node
Add the Bluetooth node for RB5 as well as its dependencies in the form
of the uart6 -> serial1 alias and the pin function for the Bluetooth
enable GPIO.
Nikita Travkin [Tue, 5 Dec 2023 11:48:12 +0000 (16:48 +0500)]
arm64: dts: qcom: acer-aspire1: Add sound
This laptop has two i2s speakers; an i2s audio codec for the headset
jack; two DMIC microphones in the lid and the displayport audio channel.
This commit adds the audio node that describes all of the above with the
exception of the DMICs that require in-SoC digital codec to be brought
up, which will be done later.
Note that the displayport channel is connected here for completeness,
but the displayport can't be used yet since the HPD signal is created by
the embedded controller, which will be added later.
When initially added, a mistake was made in the definition of the codec.
Despite the fact that the DMIC line is connected on the side of the
codec chip, and relevant passive components, including 0-ohm resistors
connecting the dmics, are present, the dmic line is still cut in
another place on the board, which was overlooked.
Correct this by replacing the dmic configuration with a comment
describing this hardware detail.
While at it, also add missing regulators definitions. This is not a
functional change as all the relevant regulators were already added via
the other rail supplies.
Stephan Gerhold [Mon, 4 Dec 2023 10:21:21 +0000 (11:21 +0100)]
arm64: dts: qcom: msm8939: Make blsp_dma controlled-remotely
The blsp_dma controller is shared between the different subsystems,
which is why it is already initialized by the firmware. We should not
reinitialize it from Linux to avoid potential other users of the DMA
engine to misbehave.
In mainline this can be described using the "qcom,controlled-remotely"
property. In the downstream/vendor kernel from Qualcomm there is an
opposite "qcom,managed-locally" property. This property is *not* set
for the qcom,sps-dma@7884000 [1] so adding "qcom,controlled-remotely"
upstream matches the behavior of the downstream/vendor kernel.
Adding this seems to fix some weird issues with UART where both
input/output becomes garbled with certain obscure firmware versions on
some devices.
Stephan Gerhold [Mon, 4 Dec 2023 10:21:20 +0000 (11:21 +0100)]
arm64: dts: qcom: msm8916: Make blsp_dma controlled-remotely
The blsp_dma controller is shared between the different subsystems,
which is why it is already initialized by the firmware. We should not
reinitialize it from Linux to avoid potential other users of the DMA
engine to misbehave.
In mainline this can be described using the "qcom,controlled-remotely"
property. In the downstream/vendor kernel from Qualcomm there is an
opposite "qcom,managed-locally" property. This property is *not* set
for the qcom,sps-dma@7884000 [1] so adding "qcom,controlled-remotely"
upstream matches the behavior of the downstream/vendor kernel.
Adding this seems to fix some weird issues with UART where both
input/output becomes garbled with certain obscure firmware versions on
some devices.
Stephan Gerhold [Mon, 4 Dec 2023 09:55:53 +0000 (10:55 +0100)]
arm64: dts: qcom: msm8939: Add clock-frequency for broadcast timer
Looks like not all firmware versions used for MSM8939 program the timer
frequency for both broadcast/MMIO timers, causing a WARNING at runtime:
WARNING: CPU: 0 PID: 0 at kernel/time/clockevents.c:38 cev_delta2ns+0x74/0x90
pc : cev_delta2ns+0x74/0x90
lr : clockevents_config.part.0+0x64/0x8c
Call trace:
cev_delta2ns+0x74/0x90
clockevents_config_and_register+0x20/0x34
arch_timer_mem_of_init+0x374/0x534
timer_probe+0x88/0x110
time_init+0x14/0x4c
start_kernel+0x2c0/0x640
Unfortunately there is no way to fix the firmware on most of these
devices since it's proprietary and signed. As a workaround, specify the
clock-frequency explicitly in the DT to fix the warning.
Fixes: 61550c6c156c ("arm64: dts: qcom: Add msm8939 SoC") Reported-by: Vincent Knecht <vincent.knecht@mailoo.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231204-msm8939-timer-v1-1-a2486c625786@gerhold.net Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Stephan Gerhold [Mon, 4 Dec 2023 09:46:11 +0000 (10:46 +0100)]
arm64: dts: qcom: Add missing vio-supply for AW2013
Add the missing vio-supply to all usages of the AW2013 LED controller
to ensure that the regulator needed for pull-up of the interrupt and
I2C lines is really turned on. While this seems to have worked fine so
far some of these regulators are not guaranteed to be always-on. For
example, pm8916_l6 is typically turned off together with the display
if there aren't any other devices (e.g. sensors) keeping it always-on.
Enable the UFS phy and controller so that we can access the internal
storage of the phone.
At the same time we need to bump the minimum voltage used for UFS VCC,
otherwise it doesn't initialize properly. The 2.952V is taken from the
vcc-voltage-level property downstream.
See also the following link for more information about the VCCQ/VCCQ2:
https://gerrit-public.fairphone.software/plugins/gitiles/kernel/msm-extra/devicetree/+/1590a3739e7dc29d2597307881553236d492f188/fp5/yupik-idp-pm7250b.dtsi#207
Luca Weiss [Sat, 25 Nov 2023 12:19:27 +0000 (13:19 +0100)]
arm64: dts: qcom: msm8953: Set initial address for memory
The dtbs_check really doesn't like having memory without reg set.
The base address depends on the amount of RAM you have:
<= 2.00 GiB RAM: 0x80000000
= 3.00 GiB RAM: 0x40000000
= 3.75 GiB RAM: 0x10000000
(more does not fit into the 32-bit physical address space)
So, let's pick one of the values, 0x10000000 which is used on devices
with 3.75 GiB RAM. Since the bootloader will update it to what's present
on the device it doesn't matter too much.
Nitin Rawat [Tue, 5 Dec 2023 14:38:55 +0000 (15:38 +0100)]
arm64: dts: qcom: sc7280: Add UFS nodes for sc7280 soc
Add UFS host controller and PHY nodes for sc7280 soc.
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Tested-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[luca: various cleanups and additions as written in the cover letter] Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20231205-sc7280-ufs-v6-2-ad6ca7796de7@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Rajendra Nayak [Tue, 5 Dec 2023 06:24:01 +0000 (11:54 +0530)]
arm64: dts: qcom: Add base X1E80100 dtsi and the QCP dts
Add base dtsi and QCP board (Qualcomm Compute Platform) dts file for
X1E80100 SoC, describing the CPUs, GCC and RPMHCC clock controllers,
geni UART, interrupt controller, TLMM, reserved memory, interconnects,
SMMU and LLCC nodes.
Co-developed-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Link: https://lore.kernel.org/r/20231205062403.14848-4-quic_sibis@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Now interconnect dependent devices are added in sm8650 DTSI,
now enable more devices for the Qualcomm SM8650 QRD board:
- PCIe
- Display
- DSPs
- SDCard
- UFS
- USB role switch with PMIC Glink
- Bluetooth
Now interconnect dependent devices are added in sm8650 DTSI,
now enable more devices for the Qualcomm SM8650 MTP board:
- PCIe
- Display
- DSPs
- SDCard
- UFS
- USB role switch with PMIC Glink
Johan Hovold [Mon, 20 Nov 2023 16:43:31 +0000 (17:43 +0100)]
arm64: dts: qcom: sm8550: fix USB wakeup interrupt types
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.
Note that only triggering on rising edges can be used to detect resume
events but not disconnect events.
Fixes: 7f7e5c1b037f ("arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes") Cc: Abel Vesa <abel.vesa@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231120164331.8116-12-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Johan Hovold [Mon, 20 Nov 2023 16:43:30 +0000 (17:43 +0100)]
arm64: dts: qcom: sm8150: fix USB wakeup interrupt types
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.
Fixes: 0c9dde0d2015 ("arm64: dts: qcom: sm8150: Add secondary USB and PHY nodes") Fixes: b33d2868e8d3 ("arm64: dts: qcom: sm8150: Add USB and PHY device nodes") Cc: stable@vger.kernel.org # 5.10 Cc: Jonathan Marek <jonathan@marek.ca> Cc: Jack Pham <quic_jackp@quicinc.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Jack Pham <quic_jackp@quicinc.com> Link: https://lore.kernel.org/r/20231120164331.8116-11-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Johan Hovold [Mon, 20 Nov 2023 16:43:29 +0000 (17:43 +0100)]
arm64: dts: qcom: sm6375: fix USB wakeup interrupt types
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.
Fixes: 59d34ca97f91 ("arm64: dts: qcom: Add initial device tree for SM6375") Cc: stable@vger.kernel.org # 6.2 Cc: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20231120164331.8116-10-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Johan Hovold [Mon, 20 Nov 2023 16:43:28 +0000 (17:43 +0100)]
arm64: dts: qcom: sdm845: fix USB wakeup interrupt types
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.
Johan Hovold [Mon, 20 Nov 2023 16:43:27 +0000 (17:43 +0100)]
arm64: dts: qcom: sdm670: fix USB wakeup interrupt types
The DP/DM wakeup interrupts are edge triggered and which edge to trigger
on depends on use-case and whether a Low speed or Full/High speed device
is connected.
Fixes: 07c8ded6e373 ("arm64: dts: qcom: add sdm670 and pixel 3a device trees") Cc: stable@vger.kernel.org # 6.2 Cc: Richard Acayan <mailingradian@gmail.com> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Acked-by: Richard Acayan <mailingradian@gmail.com> Link: https://lore.kernel.org/r/20231120164331.8116-8-johan+linaro@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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